/linux-master/arch/m68k/coldfire/ |
H A D | head.S | 31 movel #CONFIG_RAMSIZE,%d0 /* hard coded memory size */ 45 movel MCFSIM_DMR0,%d0 /* get mask for 1st bank */ 46 btst #0,%d0 /* check if region enabled */ 48 andl #0xfffc0000,%d0 50 addl #0x00040000,%d0 /* convert mask to size */ 58 addl %d1,%d0 /* total mem size in d0 */ 64 movel MCFSIM_CSOR7,%d0 /* get SDRAM address mask */ 65 andil #0xfffff000,%d0 /* mask out chip select options */ 66 negl %d0 /* negat [all...] |
/linux-master/arch/m68k/math-emu/ |
H A D | fp_cond.S | 62 move.l %d2,%d0 63 swap %d0 64 fp_get_instr_word %d0,fp_err_ua1 65 lea (-2,%a0,%d0.l),%a0 67 move.l %d2,%d0 68 swap %d0 70 tst.l %d0 79 fp_get_instr_word %d0,fp_err_ua1 80 add.w %d0,%a1 82 printf PDECODE,"d%d,%x\n",2,%d0, [all...] |
H A D | fp_util.S | 49 * something here. %d0 and %d1 is always usable, sometimes %d2 (or 70 2: clr.l %d0 94 | args: %d0 = source (32-bit long) 98 printf PCONV,"l2e: %p -> %p(",2,%d0,%a0 100 tst.l %d0 104 neg.l %d0 108 move.l %d0,(%a0)+ | set mantissa 125 | args: %d0 = source (single-precision fp value) 129 printf PCONV,"s2e: %p -> %p(",2,%d0,%a0 130 move.l %d0, [all...] |
H A D | fp_entry.S | 50 GET_CURRENT(%d0) 73 tst.l %d0 115 jmp ([0f:w,%pc,%d0.w*4]) 125 move.l (PT_OFF_D0+8,%sp),%d0 126 printf PREGISTER,"{d0->%08x}",1,%d0 130 move.l (PT_OFF_D1+8,%sp),%d0 131 printf PREGISTER,"{d1->%08x}",1,%d0 135 move.l (PT_OFF_D2+8,%sp),%d0 136 printf PREGISTER,"{d2->%08x}",1,%d0 [all...] |
H A D | fp_move.S | 48 move.w %d0,%d1 | store data size twice in %d1 50 move.w %d0,%d1 53 clr.l %d0 54 move.b (%a0,%d1.w),%d0 55 printf PDECODE,"fmove.%c ",1,%d0 57 printf PDECODE,"fp%d,",1,%d0 75 move.w %d0,%d1 98 move.l %d0,%d1 100 move.w %d2,%d0 102 move.b %d1,%d0 [all...] |
/linux-master/arch/m68k/kernel/ |
H A D | relocate_kernel.S | 34 pmove %tc,%d0 /* Disable MMU */ 35 bclr #7,%d0 36 pmove %d0,%tc 56 movel %a4,%d0 57 andl #0xff000000,%d0 58 orw #0xe020,%d0 /* Map 16 MiB, enable, cacheable */ 60 movec %d0,%itt0 61 movec %d0,%dtt0 66 moveq #0,%d0 68 movec %d0, [all...] |
H A D | sun3-head.S | 40 moveq #FC_CONTROL, %d0 41 movec %d0, %sfc 42 movec %d0, %dfc 45 moveq #0, %d0 46 movsb %d0, AC_CONTEXT 64 moveq #ICACHE_ONLY,%d0 | Cache disabled until we're ready to enable it 65 movc %d0, %cacr | is this the right value? (yes --m) 73 movl #(PAGESIZE),%d0 74 movc %d0,%msp 75 moveq #-1,%d0 [all...] |
/linux-master/drivers/video/fbdev/core/ |
H A D | cfbcopyarea.c | 107 unsigned long d0, d1; local 117 d0 = FB_READL(src); 118 d0 = fb_rev_pixels_in_long(d0, bswapmask); 121 d0 <<= left; 124 d0 >>= right; 129 d0 = d0 >> right | d1 << left; 131 d0 = fb_rev_pixels_in_long(d0, bswapmas 280 unsigned long d0, d1; local [all...] |
H A D | syscopyarea.c | 76 unsigned long d0, d1; local 95 d0 = *src++; 97 *dst = comp(d0 >> right | d1 << left, *dst, 107 this value in 'd0'. */ 108 d0 = *src++; 112 *dst = comp(d0 << left, *dst, first); 118 *dst = comp(d0 >> right | d1 << left, *dst, 120 d0 = d1; 130 *dst++ = d0 >> right | d1 << left; 131 d0 253 unsigned long d0, d1; local [all...] |
/linux-master/arch/powerpc/math-emu/ |
H A D | udivmodti4.c | 12 _FP_W_TYPE d1, _FP_W_TYPE d0) 20 if (d0 > n1) 24 udiv_qrnnd (q0, n0, n1, n0, d0); 33 if (d0 == 0) 34 d0 = 1 / d0; /* Divide intentionally by zero. */ 36 udiv_qrnnd (q1, n1, 0, n1, d0); 37 udiv_qrnnd (q0, n0, n1, n0, d0); 47 if (d0 > n1) 51 count_leading_zeros (bm, d0); 10 _fp_udivmodti4(_FP_W_TYPE q[2], _FP_W_TYPE r[2], _FP_W_TYPE n1, _FP_W_TYPE n0, _FP_W_TYPE d1, _FP_W_TYPE d0) argument [all...] |
/linux-master/arch/x86/lib/ |
H A D | string_32.c | 21 int d0, d1, d2; local 26 : "=&S" (d0), "=&D" (d1), "=&a" (d2) 36 int d0, d1, d2, d3; local 46 : "=&S" (d0), "=&D" (d1), "=&c" (d2), "=&a" (d3) 56 int d0, d1, d2, d3; local 64 : "=&S" (d0), "=&D" (d1), "=&a" (d2), "=&c" (d3) 74 int d0, d1, d2, d3; local 87 : "=&S" (d0), "=&D" (d1), "=&a" (d2), "=&c" (d3) 98 int d0, d1; local 110 : "=a" (res), "=&S" (d0), " 122 int d0, d1, d2; local 146 int d0; local 168 int d0; local 183 int d0; local 220 int d0; local [all...] |
H A D | strstr_32.c | 7 int d0, d1; local 28 : "=a" (__res), "=&c" (d0), "=&S" (d1)
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/linux-master/arch/m68k/fpsp040/ |
H A D | sto_res.S | 34 bfextu CMDREG1B(%a6){#13:#3},%d0 |extract cos destination 35 cmpib #3,%d0 |check for fp0/fp1 cases 39 subl %d0,%d1 |d1 = 7- (dest. reg. no.) 40 clrl %d0 41 bsetl %d1,%d0 |d0 is dynamic register mask 42 fmovemx (%a7)+,%d0 45 cmpib #0,%d0 47 cmpib #1,%d0 49 cmpib #2,%d0 [all...] |
H A D | x_operr.S | 67 moveml %d0-%d1/%a0-%a1,USER_DA(%a6) 82 movel CMDREG1B(%a6),%d0 83 bfextu %d0{#3:#3},%d0 |0=long, 4=word, 6=byte 84 cmpib #0,%d0 |determine size; check long 86 cmpib #4,%d0 |check word 88 cmpib #6,%d0 |check byte 101 moveml USER_DA(%a6),%d0-%d1/%a0-%a1 110 moveb STAG(%a6),%d0 |test stag for nan 111 andib #0xe0,%d0 |cl [all...] |
H A D | stanh.S | 87 movel (%a0),%d0 88 movew 4(%a0),%d0 89 movel %d0,X(%a6) 90 andl #0x7FFFFFFF,%d0 91 cmp2l BOUNDS1(%pc),%d0 | ...2**(-40) < |X| < (5/2)LOG2 ? 97 movel X(%a6),%d0 98 movel %d0,SGN(%a6) 99 andl #0x7FFF0000,%d0 100 addl #0x00010000,%d0 | ...EXPONENT OF 2|X| 101 movel %d0, [all...] |
H A D | x_store.S | 41 movel CMDREG3B(%a6),%d0 42 bfextu %d0{#6:#3},%d0 |isolate dest. reg from cmdreg3b 45 moveb (%a1,%d0.w),%d0 |convert reg# to dynamic register mask 50 fmovemx (%a0),%d0 |move to correct register 56 cmpb #0x80,%d0 61 cmpb #0x40,%d0 66 cmpb #0x20,%d0 71 cmpb #0x10,%d0 [all...] |
H A D | stwotox.S | 201 movel (%a0),%d0 202 orl #0x00800001,%d0 203 fadds %d0,%fp0 211 movel (%a0),%d0 212 movew 4(%a0),%d0 214 andil #0x7FFFFFFF,%d0 216 cmpil #0x3FB98000,%d0 | ...|X| >= 2**(-70)? 221 cmpil #0x400D80C0,%d0 | ...|X| > 16480? 236 movel N(%a6),%d0 237 movel %d0, [all...] |
/linux-master/arch/m68k/include/asm/ |
H A D | m525xsim.h | 242 moveb #MCFINTC2_VECBASE,%d0 243 moveb %d0,0x16b(%a1) /* interrupt base register */ variable 248 movel #0x001F0021,%d0 /* disable C/I bit */ 249 movel %d0,0x84(%a0) /* set CSMR0 */ variable 255 movel 0x180(%a1),%d0 /* get current PLL value */ 256 andl #0xfffffffe,%d0 /* PLL bypass first */ 257 movel %d0,0x180(%a1) /* set PLL register */ variable 266 movel #0x125a40f0,%d0 /* set for 140MHz */ 267 movel %d0,0x180(%a1) /* set PLL register */ variable 268 orl #0x1,%d0 269 movel %d0,0x180(%a1) /* set PLL register */ variable 277 movel %d0,0x8c(%a0) variable 279 movel %d0,0x90(%a0) variable 281 movew %d0,0x96(%a0) variable 287 movel %d0,0x98(%a0) variable 289 movel %d0,0x9c(%a0) variable 291 movew %d0,0xa2(%a0) variable 294 movel %d0,0x18c(%a1) variable 296 movel %d0,0x190(%a1) variable 299 orl %d0,0xc(%a1) /* function GPIO19 */ variable 300 orl %d0,0x8(%a1) /* enable GPIO19 as output */ variable 301 orl %d0,0x4(%a1) /* de-assert IDE reset */ variable [all...] |
/linux-master/lib/math/ |
H A D | rational.c | 45 * n2/d2, n1/d1, and n0/d0 are our successively more accurate 51 unsigned long n, d, n0, d0, n1, d1, n2, d2; local 55 n1 = d0 = 1; 75 d2 = d0 + a * d1; 86 t = (max_denominator - d0) / d1; 94 if (!d1 || 2u * t > a || (2u * t == a && d0 * dp > d1 * d)) { 96 d1 = d0 + t * d1; 102 d0 = d1;
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/linux-master/arch/m68k/lib/ |
H A D | mulsi3.S | 67 #define d0 REG (d0) define 89 movew sp@(4), d0 /* x0 -> d0 */ 90 muluw sp@(10), d0 /* x0*y1 */ 94 addw d1, d0 96 addl d1, d0 98 swap d0 99 clrw d0 102 addl d1, d0 [all...] |
H A D | udivsi3.S | 67 #define d0 REG (d0) define 92 movel sp@(8), d0 /* d0 = dividend */ 96 movel d0, d2 100 movew d2, d0 /* save high quotient */ 101 swap d0 104 movew d2, d0 109 lsrl IMM (1), d0 /* shift dividend */ 112 divu d1, d0 /* no [all...] |
H A D | umodsi3.S | 67 #define d0 REG (d0) define 90 movel sp@(4), d0 /* d0 = dividend */ 92 movel d0, sp@- 98 movel d0, sp@- 99 jbsr SYM (__mulsi3) /* d0 = (a/b)*b */ 102 mulsl d1,d0 105 subl d0, d1 /* d1 = a - (a/b)*b */ 106 movel d1, d0 [all...] |
H A D | modsi3.S | 69 #define d0 REG (d0) define 92 movel sp@(4), d0 /* d0 = dividend */ 94 movel d0, sp@- 100 movel d0, sp@- 101 jbsr SYM (__mulsi3) /* d0 = (a/b)*b */ 104 mulsl d1,d0 107 subl d0, d1 /* d1 = a - (a/b)*b */ 108 movel d1, d0 [all...] |
/linux-master/arch/m68k/68000/ |
H A D | entry.S | 45 addql #1,%d0 48 movel #-ENOSYS,%d0 55 1: movel %d0,%sp@(PT_OFF_D0) /* save the return value */ 71 movel %sp@(PT_OFF_ORIG_D0),%d0 78 cmpl #NR_syscalls,%d0 80 lsl #2,%d0 82 movel %a0@(%d0), %a0 84 movel %d0,%sp@(PT_OFF_D0) /* save the return value*/ 127 movew %sp@(PT_OFF_FORMATVEC), %d0 128 and #0x3ff, %d0 [all...] |
H A D | head.S | 73 moveq #0, %d0 74 movew %d0, 0xfffff618 /* Watchdog off */ 101 moveq #0, %d0 102 movew #16384, %d0 /* PLL settle wait loop */ 104 subw #1, %d0 132 movel #0x007FFFFF, %d0 /* IMR */ 133 movel %d0, 0xfffff304 134 moveb 0xfffff42b, %d0 135 andb #0xe0, %d0 136 moveb %d0, [all...] |