Searched refs:ctrl_bit (Results 1 - 5 of 5) sorted by relevance
| /linux-master/drivers/net/ethernet/hisilicon/hns3/hns3pf/ |
| H A D | hclge_mdio.c | 32 u8 ctrl_bit; member in struct:hclge_mdio_cfg_cmd
62 hnae3_set_bit(mdio_cmd->ctrl_bit, HCLGE_MDIO_CTRL_START_B, 1);
63 hnae3_set_field(mdio_cmd->ctrl_bit, HCLGE_MDIO_CTRL_ST_M,
65 hnae3_set_field(mdio_cmd->ctrl_bit, HCLGE_MDIO_CTRL_OP_M,
100 hnae3_set_bit(mdio_cmd->ctrl_bit, HCLGE_MDIO_CTRL_START_B, 1);
101 hnae3_set_field(mdio_cmd->ctrl_bit, HCLGE_MDIO_CTRL_ST_M,
103 hnae3_set_field(mdio_cmd->ctrl_bit, HCLGE_MDIO_CTRL_OP_M,
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| /linux-master/drivers/gpu/drm/omapdrm/dss/ |
| H A D | dss.c | 477 u8 ctrl_bit = ctrl_bits[channel]; local
482 REG_FLD_MOD(dss, DSS_CONTROL, 0, ctrl_bit, ctrl_bit);
490 REG_FLD_MOD(dss, DSS_CONTROL, 1, ctrl_bit, ctrl_bit);
510 u8 ctrl_bit = ctrl_bits[channel]; local
514 REG_FLD_MOD(dss, DSS_CONTROL, 0, ctrl_bit, ctrl_bit);
521 REG_FLD_MOD(dss, DSS_CONTROL, 1, ctrl_bit, ctrl_bit);
539 u8 ctrl_bit = ctrl_bits[channel]; local
[all...] |
| /linux-master/drivers/hwmon/ |
| H A D | ltc2992.c | 129 u8 ctrl_bit; member in struct:ltc2992_gpio_regs
143 .ctrl_bit = LTC2992_GPIO1_BIT,
155 .ctrl_bit = LTC2992_GPIO2_BIT,
167 .ctrl_bit = LTC2992_GPIO3_BIT,
179 .ctrl_bit = LTC2992_GPIO4_BIT,
273 assign_bit(ltc2992_gpio_addr_map[offset].ctrl_bit, &gpio_ctrl, value);
289 assign_bit(ltc2992_gpio_addr_map[gpio_nr].ctrl_bit, &gpio_ctrl_io, true);
292 assign_bit(ltc2992_gpio_addr_map[gpio_nr].ctrl_bit, &gpio_ctrl, true);
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| /linux-master/drivers/net/ethernet/netronome/nfp/nfpcore/ |
| H A D | nfp_nsp_eth.c | 513 u64 val, const u64 ctrl_bit)
537 entries[idx].control |= cpu_to_le64(ctrl_bit);
574 #define NFP_ETH_SET_BIT_CONFIG(nsp, raw_idx, mask, val, ctrl_bit) \
578 val, ctrl_bit); \
511 nfp_eth_set_bit_config(struct nfp_nsp *nsp, unsigned int raw_idx, const u64 mask, const unsigned int shift, u64 val, const u64 ctrl_bit) argument
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| /linux-master/drivers/regulator/ |
| H A D | rk808-regulator.c | 129 _n_voltages, _vr, _er, _lr, ctrl_bit,\
145 .enable_mask = ENABLE_MASK(ctrl_bit),\
146 .enable_val = ENABLE_MASK(ctrl_bit),\
147 .disable_val = DISABLE_VAL(ctrl_bit),\
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Completed in 211 milliseconds