Searched refs:bMaskDWord (Results 1 - 13 of 13) sorted by relevance

/linux-master/drivers/staging/rtl8723bs/hal/
H A DHalPhyRf_8723B.c77 PHY_SetBBReg(pDM_Odm->Adapter, rOFDM0_XATxIQImbalance, bMaskDWord, value32);
90 PHY_SetBBReg(pDM_Odm->Adapter, rOFDM0_XBTxIQImbalance, bMaskDWord, value32);
105 PHY_SetBBReg(pDM_Odm->Adapter, rOFDM0_XATxIQImbalance, bMaskDWord, OFDMSwingTable_New[OFDM_index]);
111 PHY_SetBBReg(pDM_Odm->Adapter, rOFDM0_XBTxIQImbalance, bMaskDWord, OFDMSwingTable_New[OFDM_index]);
377 Path_SEL_BB = PHY_QueryBBReg(pDM_Odm->Adapter, 0x948, bMaskDWord);
393 PHY_SetBBReg(pDM_Odm->Adapter, rTx_IQK, bMaskDWord, 0x01007c00);
394 PHY_SetBBReg(pDM_Odm->Adapter, rRx_IQK, bMaskDWord, 0x01004800);
396 PHY_SetBBReg(pDM_Odm->Adapter, rTx_IQK_Tone_A, bMaskDWord, 0x18008c1c);
397 PHY_SetBBReg(pDM_Odm->Adapter, rRx_IQK_Tone_A, bMaskDWord, 0x38008c1c);
398 PHY_SetBBReg(pDM_Odm->Adapter, rTx_IQK_Tone_B, bMaskDWord,
[all...]
H A Dodm_DynamicBBPowerSaving.c37 pDM_PSTable->Reg874 = (PHY_QueryBBReg(pDM_Odm->Adapter, 0x874, bMaskDWord)&0x1CC000)>>14;
38 pDM_PSTable->RegC70 = (PHY_QueryBBReg(pDM_Odm->Adapter, 0xc70, bMaskDWord)&BIT3)>>3;
39 pDM_PSTable->Reg85C = (PHY_QueryBBReg(pDM_Odm->Adapter, 0x85c, bMaskDWord)&0xFF000000)>>24;
40 pDM_PSTable->RegA74 = (PHY_QueryBBReg(pDM_Odm->Adapter, 0xa74, bMaskDWord)&0xF000)>>12;
41 /* Reg818 = PHY_QueryBBReg(padapter, 0x818, bMaskDWord); */
H A Dodm_RegConfig8723B.c31 pDM_Odm->Adapter, RF_PATH, Addr, bMaskDWord
40 getvalue = PHY_QueryRFReg(pDM_Odm->Adapter, RF_PATH, Addr, bMaskDWord);
51 pDM_Odm->Adapter, RF_PATH, Addr, bMaskDWord
76 pDM_Odm->Adapter, RF_PATH, Addr, bMaskDWord
H A Drtl8723b_phycfg.c77 if (BitMask != bMaskDWord) { /* if not "double word" write */
113 tmplong2 = PHY_QueryBBReg(Adapter, rFPGA0_XA_HSSIParameter2|MaskforPhySet, bMaskDWord);
115 PHY_SetBBReg(Adapter, rFPGA0_XA_HSSIParameter2|MaskforPhySet, bMaskDWord, tmplong2&(~bLSSIReadEdge));
117 tmplong2 = PHY_QueryBBReg(Adapter, rFPGA0_XB_HSSIParameter2|MaskforPhySet, bMaskDWord);
119 PHY_SetBBReg(Adapter, rFPGA0_XB_HSSIParameter2|MaskforPhySet, bMaskDWord, tmplong2&(~bLSSIReadEdge));
122 tmplong2 = PHY_QueryBBReg(Adapter, rFPGA0_XA_HSSIParameter2|MaskforPhySet, bMaskDWord);
123 PHY_SetBBReg(Adapter, rFPGA0_XA_HSSIParameter2|MaskforPhySet, bMaskDWord, tmplong2 & (~bLSSIReadEdge));
124 PHY_SetBBReg(Adapter, rFPGA0_XA_HSSIParameter2|MaskforPhySet, bMaskDWord, tmplong2 | bLSSIReadEdge);
211 PHY_SetBBReg(Adapter, pPhyReg->rf3wireOffset, bMaskDWord, DataAndAddr);
H A Dodm_DIG.c42 value32 = PHY_QueryBBReg(pDM_Odm->Adapter, ODM_REG_NHM_CNT_11N, bMaskDWord);
144 value32 = PHY_QueryBBReg(pDM_Odm->Adapter, ODM_REG_RPT_11N, bMaskDWord);
237 PHY_SetBBReg(pDM_Odm->Adapter, ODM_REG_DBG_RPT_11N, bMaskDWord, 0x208);
633 pDM_Odm->Adapter, ODM_REG_OFDM_FA_TYPE1_11N, bMaskDWord
639 pDM_Odm->Adapter, ODM_REG_OFDM_FA_TYPE2_11N, bMaskDWord
645 pDM_Odm->Adapter, ODM_REG_OFDM_FA_TYPE3_11N, bMaskDWord
651 pDM_Odm->Adapter, ODM_REG_OFDM_FA_TYPE4_11N, bMaskDWord
679 pDM_Odm->Adapter, ODM_REG_CCK_CCA_CNT_11N, bMaskDWord
H A DHalHWImg8723B_BB.c231 odm_ConfigBB_AGC_8723B(pDM_Odm, v1, bMaskDWord, v2);
265 odm_ConfigBB_AGC_8723B(pDM_Odm, v1, bMaskDWord, v2);
493 odm_ConfigBB_PHY_8723B(pDM_Odm, v1, bMaskDWord, v2);
526 odm_ConfigBB_PHY_8723B(pDM_Odm, v1, bMaskDWord, v2);
/linux-master/drivers/staging/rtl8192e/rtl8192e/
H A Dr8192E_phy.c37 if (dwBitMask != bMaskDWord) {
71 bMaskDWord,
78 bMaskDWord,
96 rtl92e_set_bb_reg(dev, pPhyReg->rf3wireOffset, bMaskDWord,
119 bMaskDWord,
126 bMaskDWord,
135 rtl92e_set_bb_reg(dev, pPhyReg->rf3wireOffset, bMaskDWord, DataAndAddr);
143 bMaskDWord,
288 bMaskDWord,
294 bMaskDWord,
[all...]
H A Drtl_dm.c470 bMaskDWord,
475 bMaskDWord, dm_tx_bb_gain[4]);
487 bMaskDWord,
491 bMaskDWord,
646 bMaskDWord);
719 rtl92e_set_bb_reg(dev, rOFDM0_XATxIQImbalance, bMaskDWord,
840 rtl92e_set_bb_reg(dev, rCCK0_TxFilter2, bMaskDWord, TempVal);
854 rtl92e_set_bb_reg(dev, rCCK0_TxFilter2, bMaskDWord, TempVal);
877 rtl92e_set_bb_reg(dev, rCCK0_TxFilter2, bMaskDWord, TempVal);
891 rtl92e_set_bb_reg(dev, rCCK0_TxFilter2, bMaskDWord, TempVa
[all...]
H A Dr8192E_dev.c625 bMaskDWord);
626 rtl92e_get_bb_reg(dev, rOFDM0_XCTxIQImbalance, bMaskDWord);
H A Dr8192E_phyreg.h732 #define bMaskDWord 0xffffffff macro
/linux-master/drivers/staging/rtl8712/
H A Drtl871x_mp.c220 if (bitmask != bMaskDWord) {
245 if (bitmask != bMaskDWord) {
355 set_bb_reg(pAdapter, rFPGA0_AnalogParameter2, bMaskDWord, 0x58);
370 set_bb_reg(pAdapter, rFPGA0_AnalogParameter2, bMaskDWord, 0x18);
H A Drtl871x_mp_phy_regdef.h974 #define bMaskDWord 0xffffffff macro
/linux-master/drivers/staging/rtl8723bs/include/
H A DHal8192CPhyReg.h1064 #define bMaskDWord 0xffffffff macro

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