Searched refs:VIDEO_CC_MVS1C_CLK_ARES (Results 1 - 10 of 10) sorted by relevance
| /linux-master/scripts/dtc/include-prefixes/dt-bindings/reset/ |
| H A D | qcom,sm8350-videocc.h | 15 #define VIDEO_CC_MVS1C_CLK_ARES 5 macro
|
| /linux-master/include/dt-bindings/reset/ |
| H A D | qcom,sm8350-videocc.h | 15 #define VIDEO_CC_MVS1C_CLK_ARES 5 macro
|
| /linux-master/include/dt-bindings/clock/ |
| H A D | qcom,videocc-sm8250.h | 28 #define VIDEO_CC_MVS1C_CLK_ARES 5 macro
|
| H A D | qcom,sm8450-videocc.h | 36 #define VIDEO_CC_MVS1C_CLK_ARES 6 macro
|
| /linux-master/scripts/dtc/include-prefixes/dt-bindings/clock/ |
| H A D | qcom,videocc-sm8250.h | 28 #define VIDEO_CC_MVS1C_CLK_ARES 5 macro
|
| H A D | qcom,sm8450-videocc.h | 36 #define VIDEO_CC_MVS1C_CLK_ARES 6 macro
|
| /linux-master/drivers/clk/qcom/ |
| H A D | videocc-sm8550.c | 382 [VIDEO_CC_MVS1C_CLK_ARES] = { .reg = 0x8090, .bit = 2, .udelay = 1000 },
|
| H A D | videocc-sm8250.c | 329 [VIDEO_CC_MVS1C_CLK_ARES] = { 0xcd4, .bit = 2, .udelay = 150 },
|
| H A D | videocc-sm8450.c | 377 [VIDEO_CC_MVS1C_CLK_ARES] = { .reg = 0x808c, .bit = 2, .udelay = 1000 },
|
| H A D | videocc-sm8350.c | 494 [VIDEO_CC_MVS1C_CLK_ARES] = { .reg = 0xcd4, .bit = 2, .udelay = 400 },
|
Completed in 111 milliseconds