Searched refs:TPC0_CFG_QM_TENSOR_5_DIM_1_SIZE_V_SHIFT (Results 1 - 2 of 2) sorted by relevance

/linux-master/drivers/accel/habanalabs/include/goya/asic_reg/
H A Dtpc0_cfg_masks.h1281 #define TPC0_CFG_QM_TENSOR_5_DIM_1_SIZE_V_SHIFT 0 macro
/linux-master/drivers/accel/habanalabs/include/gaudi/asic_reg/
H A Dtpc0_cfg_masks.h1807 #define TPC0_CFG_QM_TENSOR_5_DIM_1_SIZE_V_SHIFT 0 macro

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