Searched refs:TPC0_CFG_KERNEL_TENSOR_5_BASE_ADDR_HIGH_V_SHIFT (Results 1 - 2 of 2) sorted by relevance

/linux-master/drivers/accel/habanalabs/include/goya/asic_reg/
H A Dtpc0_cfg_masks.h427 #define TPC0_CFG_KERNEL_TENSOR_5_BASE_ADDR_HIGH_V_SHIFT 0 macro
/linux-master/drivers/accel/habanalabs/include/gaudi/asic_reg/
H A Dtpc0_cfg_masks.h357 #define TPC0_CFG_KERNEL_TENSOR_5_BASE_ADDR_HIGH_V_SHIFT 0 macro

Completed in 105 milliseconds