Searched refs:SOR_LANE_SEQ_CTL (Results 1 - 2 of 2) sorted by relevance
/linux-master/drivers/gpu/drm/tegra/ |
H A D | sor.h | 156 #define SOR_LANE_SEQ_CTL 0x21 macro
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H A D | sor.c | 679 tegra_sor_writel(sor, value, SOR_LANE_SEQ_CTL); 684 value = tegra_sor_readl(sor, SOR_LANE_SEQ_CTL); 711 tegra_sor_writel(sor, value, SOR_LANE_SEQ_CTL); 716 value = tegra_sor_readl(sor, SOR_LANE_SEQ_CTL); 1568 DEBUGFS_REG32(SOR_LANE_SEQ_CTL), 2319 value = tegra_sor_readl(sor, SOR_LANE_SEQ_CTL); 2328 tegra_sor_writel(sor, value, SOR_LANE_SEQ_CTL); 2331 value = tegra_sor_readl(sor, SOR_LANE_SEQ_CTL);
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