Searched refs:SOR_LANE_SEQ_CTL (Results 1 - 2 of 2) sorted by relevance

/linux-master/drivers/gpu/drm/tegra/
H A Dsor.h156 #define SOR_LANE_SEQ_CTL 0x21 macro
H A Dsor.c679 tegra_sor_writel(sor, value, SOR_LANE_SEQ_CTL);
684 value = tegra_sor_readl(sor, SOR_LANE_SEQ_CTL);
711 tegra_sor_writel(sor, value, SOR_LANE_SEQ_CTL);
716 value = tegra_sor_readl(sor, SOR_LANE_SEQ_CTL);
1568 DEBUGFS_REG32(SOR_LANE_SEQ_CTL),
2319 value = tegra_sor_readl(sor, SOR_LANE_SEQ_CTL);
2328 tegra_sor_writel(sor, value, SOR_LANE_SEQ_CTL);
2331 value = tegra_sor_readl(sor, SOR_LANE_SEQ_CTL);

Completed in 145 milliseconds