Searched refs:PXA1928_CLK_UART0 (Results 1 - 3 of 3) sorted by relevance

/linux-master/scripts/dtc/include-prefixes/dt-bindings/clock/
H A Dmarvell,pxa1928.h20 #define PXA1928_CLK_UART0 0x0b macro
/linux-master/include/dt-bindings/clock/
H A Dmarvell,pxa1928.h20 #define PXA1928_CLK_UART0 0x0b macro
/linux-master/drivers/clk/mmp/
H A Dclk-of-pxa1928.c99 {0, "uart0_mux", uart_parent_names, ARRAY_SIZE(uart_parent_names), CLK_SET_RATE_PARENT, PXA1928_CLK_UART0 * 4, 4, 3, 0, &uart0_lock},
122 {PXA1928_CLK_UART0, "uart0_clk", "uart0_mux", CLK_SET_RATE_PARENT, PXA1928_CLK_UART0 * 4, 0x3, 0x3, 0x0, 0, &uart0_lock},

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