Searched refs:PLL_ODIV1_REG (Results 1 - 1 of 1) sorted by relevance

/linux-master/drivers/clk/axs10x/
H A Di2s_pll_clock.c22 #define PLL_ODIV1_REG 0xC macro
147 i2s_pll_write(clk, PLL_ODIV1_REG, pll_cfg[i].odiv1);

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