Searched refs:PLL_ODIV0_REG (Results 1 - 1 of 1) sorted by relevance

/linux-master/drivers/clk/axs10x/
H A Di2s_pll_clock.c21 #define PLL_ODIV0_REG 0x8 macro
106 odiv = i2s_pll_get_value(i2s_pll_read(clk, PLL_ODIV0_REG));
146 i2s_pll_write(clk, PLL_ODIV0_REG, pll_cfg[i].odiv0);

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