Searched refs:PCIE_USB3_PHY_PLL_CTL_OFF (Results 1 - 1 of 1) sorted by relevance

/linux-master/drivers/phy/starfive/
H A Dphy-jh7110-pcie.c20 #define PCIE_USB3_PHY_PLL_CTL_OFF 0x7c macro
66 writel(PCIE_USB3_PHY_ENABLE, data->regs + PCIE_USB3_PHY_PLL_CTL_OFF);
90 val = readl(data->regs + PCIE_USB3_PHY_PLL_CTL_OFF);
92 writel(val, data->regs + PCIE_USB3_PHY_PLL_CTL_OFF);

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