Searched refs:JH7110_SYSCLK_BUS_ROOT (Results 1 - 3 of 3) sorted by relevance

/linux-master/drivers/clk/starfive/
H A Dclk-starfive-jh7110-sys.c50 JH71X0__MUX(JH7110_SYSCLK_BUS_ROOT, "bus_root", 0, 2,
53 JH71X0__DIV(JH7110_SYSCLK_NOCSTG_BUS, "nocstg_bus", 3, JH7110_SYSCLK_BUS_ROOT),
54 JH71X0__DIV(JH7110_SYSCLK_AXI_CFG0, "axi_cfg0", 3, JH7110_SYSCLK_BUS_ROOT),
118 JH71X0__DIV(JH7110_SYSCLK_HIFI4_CORE, "hifi4_core", 15, JH7110_SYSCLK_BUS_ROOT),
141 JH71X0__DIV(JH7110_SYSCLK_VDEC_AXI, "vdec_axi", 7, JH7110_SYSCLK_BUS_ROOT),
143 JH71X0_GDIV(JH7110_SYSCLK_WAVE511_BPU, "wave511_bpu", 0, 7, JH7110_SYSCLK_BUS_ROOT),
/linux-master/scripts/dtc/include-prefixes/dt-bindings/clock/
H A Dstarfive,jh7110-crg.h22 #define JH7110_SYSCLK_BUS_ROOT 5 macro
/linux-master/include/dt-bindings/clock/
H A Dstarfive,jh7110-crg.h22 #define JH7110_SYSCLK_BUS_ROOT 5 macro

Completed in 135 milliseconds