| /linux-master/drivers/clocksource/ |
| H A D | timer-loongson1-pwm.c | 24 #define INT_EN BIT(5) macro
58 writel((INT_EN | PWM_OE | CNT_EN), timer_of_base(to) + PWM_CTRL);
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| /linux-master/sound/drivers/ |
| H A D | portman2x4.c | 124 #define INT_EN PP_CMD_IEN /* Interrupt enable. */ macro
205 * command = TXDATA0 | INT_EN;
209 command |= INT_EN;
276 cmdout = (port << 1) | INT_EN; /* Address + IE + No Strobe. */
351 int command = INT_EN;
414 portman_write_command(pm, command | INT_EN);
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| /linux-master/drivers/thermal/qcom/ |
| H A D | tsens-v2.c | 66 [INT_EN] = REG_FIELD(TM_INT_EN_OFF, 0, 2),
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| H A D | tsens-v1.c | 95 [INT_EN] = REG_FIELD(TM_INT_EN_OFF, 0, 0),
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| H A D | tsens.c | 738 ret = regmap_field_write(priv->rf[INT_EN], val);
748 regmap_field_write(priv->rf[INT_EN], 0);
990 priv->rf[INT_EN] = devm_regmap_field_alloc(dev, priv->tm_map,
991 priv->fields[INT_EN]);
992 if (IS_ERR(priv->rf[INT_EN])) {
993 ret = PTR_ERR(priv->rf[INT_EN]);
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| H A D | tsens-v0_1.c | 302 [INT_EN] = REG_FIELD(TM_INT_EN_OFF, 0, 0),
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| H A D | tsens.h | 176 INT_EN, /* v2+ has separate enables for crit, upper and lower irq */ enumerator in enum:regfield_ids
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| /linux-master/drivers/mmc/host/ |
| H A D | ushc.c | 114 #define INT_EN 1 macro
184 && test_bit(INT_EN, &ushc->flags)
192 if (!test_bit(INT_EN, &ushc->flags))
392 set_bit(INT_EN, &ushc->flags);
394 clear_bit(INT_EN, &ushc->flags);
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| /linux-master/drivers/net/ethernet/oki-semi/pch_gbe/ |
| H A D | pch_gbe_main.c | 455 iowrite32(PCH_GBE_INT_ENABLE_MASK, &hw->reg->INT_EN);
725 iowrite32(0, &hw->reg->INT_EN);
729 netdev_dbg(adapter->netdev, "INT_EN reg : 0x%08x\n",
730 ioread32(&hw->reg->INT_EN));
742 iowrite32(PCH_GBE_INT_ENABLE_MASK, &hw->reg->INT_EN);
744 netdev_dbg(adapter->netdev, "INT_EN reg : 0x%08x\n",
745 ioread32(&hw->reg->INT_EN));
1259 int_st = int_st & ioread32(&hw->reg->INT_EN);
1271 int_en = ioread32(&hw->reg->INT_EN);
1273 &hw->reg->INT_EN);
[all...] |
| H A D | pch_gbe.h | 39 u32 INT_EN; member in struct:pch_gbe_regs
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| /linux-master/drivers/net/ethernet/smsc/ |
| H A D | smsc911x.c | 1233 temp = smsc911x_reg_read(pdata, INT_EN);
1235 smsc911x_reg_write(pdata, INT_EN, temp);
1527 smsc911x_reg_write(pdata, INT_EN, 0);
1536 u32 inten = smsc911x_reg_read(pdata, INT_EN);
1541 temp = smsc911x_reg_read(pdata, INT_EN);
1543 smsc911x_reg_write(pdata, INT_EN, temp);
1578 temp = smsc911x_reg_read(pdata, INT_EN);
1580 smsc911x_reg_write(pdata, INT_EN, temp);
1681 temp = smsc911x_reg_read(pdata, INT_EN);
1683 smsc911x_reg_write(pdata, INT_EN, tem
[all...] |
| H A D | smsc911x.h | 140 #define INT_EN 0x5C macro
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| /linux-master/drivers/comedi/drivers/ |
| H A D | ni_pcidio.c | 249 #define INT_EN (COUNT_EXPIRED | WAITED | PRIMARY_TC | SECONDARY_TC) macro
251 #define INT_EN (TRANSFER_READY | COUNT_EXPIRED | WAITED \ macro
412 flags &= INT_EN;
711 writeb(INT_EN, dev->mmio + INTERRUPT_CONTROL);
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| /linux-master/drivers/gpu/drm/imx/dcss/ |
| H A D | dcss-ss.c | 59 #define INT_EN BIT(0) macro
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| /linux-master/drivers/gpu/drm/vc4/ |
| H A D | vc4_dsi.c | 1258 DSI_PORT_WRITE(INT_EN, (DSI0_INTERRUPTS_ALWAYS_ENABLED |
1261 DSI_PORT_WRITE(INT_EN,
1270 DSI_PORT_WRITE(INT_EN, (DSI1_INTERRUPTS_ALWAYS_ENABLED |
1273 DSI_PORT_WRITE(INT_EN, (DSI1_INTERRUPTS_ALWAYS_ENABLED |
1292 DSI_PORT_WRITE(INT_EN, DSI_PORT_BIT(INTERRUPTS_ALWAYS_ENABLED));
1338 DSI_PORT_WRITE(INT_EN, DSI_PORT_BIT(INTERRUPTS_ALWAYS_ENABLED));
1724 DSI_PORT_WRITE(INT_EN, DSI1_INTERRUPTS_ALWAYS_ENABLED);
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| /linux-master/drivers/scsi/mvsas/ |
| H A D | mv_defs.h | 72 INT_EN = (1U << 1), /* Global int enable */ enumerator in enum:hw_register_bits
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| H A D | mv_64xx.c | 426 mw32(MVS_GBL_CTL, tmp | INT_EN);
435 mw32(MVS_GBL_CTL, tmp & ~INT_EN);
|