Searched refs:IMX8MQ_CLK_MON_VIDEO_PLL2_DIV (Results 1 - 3 of 3) sorted by relevance

/linux-master/include/dt-bindings/clock/
H A Dimx8mq-clock.h425 #define IMX8MQ_CLK_MON_VIDEO_PLL2_DIV 300 macro
/linux-master/scripts/dtc/include-prefixes/dt-bindings/clock/
H A Dimx8mq-clock.h425 #define IMX8MQ_CLK_MON_VIDEO_PLL2_DIV 300 macro
/linux-master/drivers/clk/imx/
H A Dclk-imx8mq.c393 hws[IMX8MQ_CLK_MON_VIDEO_PLL2_DIV] = imx_clk_hw_divider("video_pll2_out_monitor", "video2_pll_out", base + 0x7c, 16, 3);

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