Searched refs:IMX7D_PLL_ENET_MAIN_40M_CLK (Results 1 - 3 of 3) sorted by relevance

/linux-master/include/dt-bindings/clock/
H A Dimx7d-clock.h54 #define IMX7D_PLL_ENET_MAIN_40M_CLK 45 macro
/linux-master/scripts/dtc/include-prefixes/dt-bindings/clock/
H A Dimx7d-clock.h54 #define IMX7D_PLL_ENET_MAIN_40M_CLK 45 macro
/linux-master/drivers/clk/imx/
H A Dclk-imx7d.c482 hws[IMX7D_PLL_ENET_MAIN_40M_CLK] = imx_clk_hw_gate("pll_enet_40m_clk", "pll_enet_40m", base + 0xe0, 7);

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