Searched refs:HW_CTRL (Results 1 - 25 of 40) sorted by relevance

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/linux-master/drivers/clk/qcom/
H A Dgdsc.h63 #define HW_CTRL BIT(2) macro
H A Dvideocc-sm8150.c182 .flags = HW_CTRL,
191 .flags = HW_CTRL,
H A Dvideocc-sdm845.c263 .flags = HW_CTRL | POLL_CFG_GDSCR,
274 .flags = HW_CTRL | POLL_CFG_GDSCR,
H A Dgdsc.c296 if (sc->flags & HW_CTRL) {
326 if (sc->flags & HW_CTRL) {
424 if (sc->flags & HW_CTRL) {
H A Dvideocc-sc7180.c169 .flags = HW_CTRL,
H A Dvideocc-sm8550.c325 .flags = POLL_CFG_GDSCR | RETAIN_FF_ENABLE | HW_CTRL,
350 .flags = POLL_CFG_GDSCR | RETAIN_FF_ENABLE | HW_CTRL,
H A Dvideocc-sm8250.c296 .flags = HW_CTRL,
305 .flags = HW_CTRL,
H A Dvideocc-sm8450.c320 .flags = RETAIN_FF_ENABLE | HW_CTRL,
345 .flags = RETAIN_FF_ENABLE | HW_CTRL,
H A Dvideocc-sm8350.c455 .flags = HW_CTRL | RETAIN_FF_ENABLE,
464 .flags = HW_CTRL | RETAIN_FF_ENABLE,
H A Dvideocc-sc7280.c239 .flags = HW_CTRL | RETAIN_FF_ENABLE,
H A Dcamcc-sdm845.c1544 .flags = HW_CTRL | POLL_CFG_GDSCR,
1553 .flags = HW_CTRL | POLL_CFG_GDSCR,
1562 .flags = HW_CTRL | POLL_CFG_GDSCR,
H A Ddispcc-sm6115.c521 .flags = HW_CTRL,
H A Ddispcc-sm6375.c514 .flags = HW_CTRL,
H A Ddispcc-qcm2290.c458 .flags = HW_CTRL,
H A Dcamcc-sm8250.c2215 .flags = HW_CTRL | POLL_CFG_GDSCR,
2224 .flags = HW_CTRL | POLL_CFG_GDSCR,
2233 .flags = HW_CTRL | POLL_CFG_GDSCR,
H A Ddispcc-sc8280xp.c3060 .flags = HW_CTRL | RETAIN_FF_ENABLE,
3072 .flags = HW_CTRL | RETAIN_FF_ENABLE,
3084 .flags = HW_CTRL | RETAIN_FF_ENABLE,
3096 .flags = HW_CTRL | RETAIN_FF_ENABLE,
H A Ddispcc-sdm845.c768 .flags = HW_CTRL | POLL_CFG_GDSCR,
H A Ddispcc-sc7280.c797 .flags = HW_CTRL | RETAIN_FF_ENABLE,
H A Ddispcc-sm6125.c615 .flags = HW_CTRL,
H A Ddispcc-sc7180.c635 .flags = HW_CTRL,
H A Ddispcc-x1e80100.c1522 .flags = HW_CTRL | RETAIN_FF_ENABLE,
1534 .flags = HW_CTRL | RETAIN_FF_ENABLE,
H A Dcamcc-sc7180.c1498 .flags = HW_CTRL,
1525 .flags = HW_CTRL,
H A Ddispcc-sm8550.c1614 .flags = HW_CTRL | RETAIN_FF_ENABLE,
1623 .flags = HW_CTRL | RETAIN_FF_ENABLE,
/linux-master/drivers/media/dvb-frontends/
H A Dmt312_priv.h100 HW_CTRL = 84, /* ZL10313 only */ enumerator in enum:mt312_reg_addr
H A Dmt312.c272 ret = mt312_write(state, HW_CTRL, buf, 2);
277 ret = mt312_writereg(state, HW_CTRL, 0x00);
705 ret = mt312_writereg(state, HW_CTRL, 0x0d);

Completed in 194 milliseconds

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