Searched refs:HHI_HDMI_PHY_CNTL0 (Results 1 - 4 of 4) sorted by relevance
/linux-master/drivers/phy/amlogic/ |
H A D | phy-meson8-hdmi-tx.c | 21 * HHI_HDMI_PHY_CNTL0 register. CTL0 and CTL1 is all we know about. 25 #define HHI_HDMI_PHY_CNTL0 0x3a0 macro 67 regmap_write(priv->hhi, HHI_HDMI_PHY_CNTL0, 92 regmap_write(priv->hhi, HHI_HDMI_PHY_CNTL0,
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/linux-master/drivers/gpu/drm/meson/ |
H A D | meson_dw_hdmi.c | 107 #define HHI_HDMI_PHY_CNTL0 0x3a0 /* 0xe8 */ macro 306 regmap_write(priv->hhi, HHI_HDMI_PHY_CNTL0, 0x333d3282); 310 regmap_write(priv->hhi, HHI_HDMI_PHY_CNTL0, 0x33303382); 314 regmap_write(priv->hhi, HHI_HDMI_PHY_CNTL0, 0x33303362); 318 regmap_write(priv->hhi, HHI_HDMI_PHY_CNTL0, 0x33604142); 325 regmap_write(priv->hhi, HHI_HDMI_PHY_CNTL0, 0x33353245); 329 regmap_write(priv->hhi, HHI_HDMI_PHY_CNTL0, 0x33634283); 333 regmap_write(priv->hhi, HHI_HDMI_PHY_CNTL0, 0x33632122); 340 regmap_write(priv->hhi, HHI_HDMI_PHY_CNTL0, 0x37eb65c4); 345 regmap_write(priv->hhi, HHI_HDMI_PHY_CNTL0, [all...] |
H A D | meson_venc.c | 69 #define HHI_HDMI_PHY_CNTL0 0x3a0 /* 0xe8 offset in data sheet */ macro 1984 regmap_write(priv->hhi, HHI_HDMI_PHY_CNTL0, 0);
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/linux-master/drivers/clk/meson/ |
H A D | gxbb.h | 106 #define HHI_HDMI_PHY_CNTL0 0x3A0 /* 0xe8 offset in data sheet */ macro
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