Searched refs:DISP_CC_MDSS_RSCC_BCR (Results 1 - 25 of 28) sorted by relevance
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| /linux-master/include/dt-bindings/clock/ |
| H A D | qcom,sm6375-dispcc.h | 37 #define DISP_CC_MDSS_RSCC_BCR 1 macro
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| H A D | qcom,dispcc-sdm845.h | 51 #define DISP_CC_MDSS_RSCC_BCR 0 macro
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| H A D | qcom,dispcc-sm8150.h | 71 #define DISP_CC_MDSS_RSCC_BCR 1 macro
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| H A D | qcom,dispcc-sm8350.h | 71 #define DISP_CC_MDSS_RSCC_BCR 1 macro
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| H A D | qcom,dispcc-sm8250.h | 71 #define DISP_CC_MDSS_RSCC_BCR 1 macro
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| H A D | qcom,sm8450-dispcc.h | 97 #define DISP_CC_MDSS_RSCC_BCR 2 macro
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| H A D | qcom,dispcc-sc8280xp.h | 94 #define DISP_CC_MDSS_RSCC_BCR 1 macro
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| H A D | qcom,sm8550-dispcc.h | 95 #define DISP_CC_MDSS_RSCC_BCR 2 macro
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| H A D | qcom,sm8650-dispcc.h | 96 #define DISP_CC_MDSS_RSCC_BCR 2 macro
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| H A D | qcom,x1e80100-dispcc.h | 92 #define DISP_CC_MDSS_RSCC_BCR 2 macro
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| /linux-master/scripts/dtc/include-prefixes/dt-bindings/clock/ |
| H A D | qcom,sm6375-dispcc.h | 37 #define DISP_CC_MDSS_RSCC_BCR 1 macro
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| H A D | qcom,dispcc-sdm845.h | 51 #define DISP_CC_MDSS_RSCC_BCR 0 macro
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| H A D | qcom,dispcc-sm8150.h | 71 #define DISP_CC_MDSS_RSCC_BCR 1 macro
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| H A D | qcom,dispcc-sm8250.h | 71 #define DISP_CC_MDSS_RSCC_BCR 1 macro
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| H A D | qcom,dispcc-sm8350.h | 71 #define DISP_CC_MDSS_RSCC_BCR 1 macro
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| H A D | qcom,sm8450-dispcc.h | 97 #define DISP_CC_MDSS_RSCC_BCR 2 macro
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| H A D | qcom,dispcc-sc8280xp.h | 94 #define DISP_CC_MDSS_RSCC_BCR 1 macro
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| H A D | qcom,sm8550-dispcc.h | 95 #define DISP_CC_MDSS_RSCC_BCR 2 macro
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| H A D | qcom,sm8650-dispcc.h | 96 #define DISP_CC_MDSS_RSCC_BCR 2 macro
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| H A D | qcom,x1e80100-dispcc.h | 92 #define DISP_CC_MDSS_RSCC_BCR 2 macro
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| /linux-master/drivers/clk/qcom/ |
| H A D | dispcc-sm6375.c | 545 [DISP_CC_MDSS_RSCC_BCR] = { 0x2000 },
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| H A D | dispcc-sdm845.c | 818 [DISP_CC_MDSS_RSCC_BCR] = { 0x5000 },
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| H A D | dispcc-sm8250.c | 1218 [DISP_CC_MDSS_RSCC_BCR] = { 0x4000 },
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| H A D | dispcc-x1e80100.c | 1622 [DISP_CC_MDSS_RSCC_BCR] = { 0xc000 },
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| H A D | dispcc-sm8550.c | 1714 [DISP_CC_MDSS_RSCC_BCR] = { 0xc000 },
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