Searched refs:DISP_CC_MDSS_CORE_BCR (Results 1 - 25 of 28) sorted by relevance
12
| /linux-master/include/dt-bindings/clock/ |
| H A D | qcom,sm6375-dispcc.h | 36 #define DISP_CC_MDSS_CORE_BCR 0 macro
|
| H A D | qcom,dispcc-qcm2290.h | 36 #define DISP_CC_MDSS_CORE_BCR 0 macro
|
| H A D | qcom,dispcc-sm8150.h | 70 #define DISP_CC_MDSS_CORE_BCR 0 macro
|
| H A D | qcom,dispcc-sm8350.h | 70 #define DISP_CC_MDSS_CORE_BCR 0 macro
|
| H A D | qcom,dispcc-sm8250.h | 70 #define DISP_CC_MDSS_CORE_BCR 0 macro
|
| H A D | qcom,sm8450-dispcc.h | 95 #define DISP_CC_MDSS_CORE_BCR 0 macro
|
| H A D | qcom,dispcc-sc8280xp.h | 93 #define DISP_CC_MDSS_CORE_BCR 0 macro
|
| H A D | qcom,sm8550-dispcc.h | 93 #define DISP_CC_MDSS_CORE_BCR 0 macro
|
| H A D | qcom,sm8650-dispcc.h | 94 #define DISP_CC_MDSS_CORE_BCR 0 macro
|
| H A D | qcom,x1e80100-dispcc.h | 90 #define DISP_CC_MDSS_CORE_BCR 0 macro
|
| /linux-master/scripts/dtc/include-prefixes/dt-bindings/clock/ |
| H A D | qcom,sm6375-dispcc.h | 36 #define DISP_CC_MDSS_CORE_BCR 0 macro
|
| H A D | qcom,dispcc-qcm2290.h | 36 #define DISP_CC_MDSS_CORE_BCR 0 macro
|
| H A D | qcom,dispcc-sm8150.h | 70 #define DISP_CC_MDSS_CORE_BCR 0 macro
|
| H A D | qcom,dispcc-sm8250.h | 70 #define DISP_CC_MDSS_CORE_BCR 0 macro
|
| H A D | qcom,dispcc-sm8350.h | 70 #define DISP_CC_MDSS_CORE_BCR 0 macro
|
| H A D | qcom,sm8450-dispcc.h | 95 #define DISP_CC_MDSS_CORE_BCR 0 macro
|
| H A D | qcom,dispcc-sc8280xp.h | 93 #define DISP_CC_MDSS_CORE_BCR 0 macro
|
| H A D | qcom,sm8550-dispcc.h | 93 #define DISP_CC_MDSS_CORE_BCR 0 macro
|
| H A D | qcom,sm8650-dispcc.h | 94 #define DISP_CC_MDSS_CORE_BCR 0 macro
|
| H A D | qcom,x1e80100-dispcc.h | 90 #define DISP_CC_MDSS_CORE_BCR 0 macro
|
| /linux-master/drivers/clk/qcom/ |
| H A D | dispcc-sm6375.c | 544 [DISP_CC_MDSS_CORE_BCR] = { 0x1000 },
|
| H A D | dispcc-qcm2290.c | 449 [DISP_CC_MDSS_CORE_BCR] = { 0x2000 },
|
| H A D | dispcc-sm8250.c | 1217 [DISP_CC_MDSS_CORE_BCR] = { 0x2000 },
|
| H A D | dispcc-x1e80100.c | 1620 [DISP_CC_MDSS_CORE_BCR] = { 0x8000 },
|
| H A D | dispcc-sm8550.c | 1712 [DISP_CC_MDSS_CORE_BCR] = { 0x8000 },
|
Completed in 301 milliseconds
12