Searched refs:CLK_VPP1_SVPP3_VDO0_DL_RELAY (Results 1 - 6 of 6) sorted by relevance

/linux-master/drivers/clk/mediatek/
H A Dclk-mt8195-vpp1.c72 GATE_VPP1_1(CLK_VPP1_SVPP3_VDO0_DL_RELAY, "vpp1_svpp3_vdo0_dl_relay", "top_vpp", 6),
H A Dclk-mt8188-vpp1.c75 GATE_VPP1_1(CLK_VPP1_SVPP3_VDO0_DL_RELAY, "vpp1_svpp3_vdo0_dl_relay", "top_vpp", 9),
/linux-master/scripts/dtc/include-prefixes/dt-bindings/clock/
H A Dmediatek,mt8188-clk.h480 #define CLK_VPP1_SVPP3_VDO0_DL_RELAY 40 macro
H A Dmt8195-clk.h582 #define CLK_VPP1_SVPP3_VDO0_DL_RELAY 38 macro
/linux-master/include/dt-bindings/clock/
H A Dmediatek,mt8188-clk.h480 #define CLK_VPP1_SVPP3_VDO0_DL_RELAY 40 macro
H A Dmt8195-clk.h582 #define CLK_VPP1_SVPP3_VDO0_DL_RELAY 38 macro

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