Searched refs:CLK_VPP0_WARP0_ASYNC (Results 1 - 3 of 3) sorted by relevance

/linux-master/drivers/clk/mediatek/
H A Dclk-mt8188-vpp0.c89 GATE_VPP0_2(CLK_VPP0_WARP0_ASYNC, "vpp0_warp0_async", "top_wpe_vpp", 1),
/linux-master/scripts/dtc/include-prefixes/dt-bindings/clock/
H A Dmediatek,mt8188-clk.h401 #define CLK_VPP0_WARP0_ASYNC 42 macro
/linux-master/include/dt-bindings/clock/
H A Dmediatek,mt8188-clk.h401 #define CLK_VPP0_WARP0_ASYNC 42 macro

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