Searched refs:CLK_TOP_UNIVPLL_D5_D2 (Results 1 - 18 of 18) sorted by relevance

/linux-master/include/dt-bindings/clock/
H A Dmt6779-clk.h80 #define CLK_TOP_UNIVPLL_D5_D2 70 macro
H A Dmt8183-clk.h105 #define CLK_TOP_UNIVPLL_D5_D2 69 macro
H A Dmt8192-clk.h104 #define CLK_TOP_UNIVPLL_D5_D2 92 macro
H A Dmt8186-clk.h110 #define CLK_TOP_UNIVPLL_D5_D2 91 macro
H A Dmediatek,mt8188-clk.h128 #define CLK_TOP_UNIVPLL_D5_D2 117 macro
H A Dmt8195-clk.h161 #define CLK_TOP_UNIVPLL_D5_D2 149 macro
/linux-master/scripts/dtc/include-prefixes/dt-bindings/clock/
H A Dmt6779-clk.h80 #define CLK_TOP_UNIVPLL_D5_D2 70 macro
H A Dmt8183-clk.h105 #define CLK_TOP_UNIVPLL_D5_D2 69 macro
H A Dmt8192-clk.h104 #define CLK_TOP_UNIVPLL_D5_D2 92 macro
H A Dmt8186-clk.h110 #define CLK_TOP_UNIVPLL_D5_D2 91 macro
H A Dmediatek,mt8188-clk.h128 #define CLK_TOP_UNIVPLL_D5_D2 117 macro
H A Dmt8195-clk.h161 #define CLK_TOP_UNIVPLL_D5_D2 149 macro
/linux-master/drivers/clk/mediatek/
H A Dclk-mt8186-topckgen.c45 FACTOR_FLAGS(CLK_TOP_UNIVPLL_D5_D2, "univpll_d5_d2", "univpll_d5", 1, 2, 0),
H A Dclk-mt8188-topckgen.c52 FACTOR(CLK_TOP_UNIVPLL_D5_D2, "univpll_d5_d2", "univpll_d5", 1, 2),
H A Dclk-mt8183.c61 FACTOR_FLAGS(CLK_TOP_UNIVPLL_D5_D2, "univpll_d5_d2", "univpll_d5", 1, 2, 0),
H A Dclk-mt8192.c50 FACTOR_FLAGS(CLK_TOP_UNIVPLL_D5_D2, "univpll_d5_d2", "univpll_d5", 1, 2, 0),
H A Dclk-mt6779.c54 FACTOR(CLK_TOP_UNIVPLL_D5_D2, "univpll_d5_d2", "univpll_d5", 1, 2),
H A Dclk-mt8195-topckgen.c63 FACTOR_FLAGS(CLK_TOP_UNIVPLL_D5_D2, "univpll_d5_d2", "univpll_d5", 1, 2, 0),

Completed in 481 milliseconds