Searched refs:CLK_TOP_U2U3_XHCI_SEL (Results 1 - 6 of 6) sorted by relevance

/linux-master/include/dt-bindings/clock/
H A Dmt7986-clk.h82 #define CLK_TOP_U2U3_XHCI_SEL 59 macro
H A Dmediatek,mt7981-clk.h120 #define CLK_TOP_U2U3_XHCI_SEL 107 macro
/linux-master/scripts/dtc/include-prefixes/dt-bindings/clock/
H A Dmt7986-clk.h82 #define CLK_TOP_U2U3_XHCI_SEL 59 macro
H A Dmediatek,mt7981-clk.h120 #define CLK_TOP_U2U3_XHCI_SEL 107 macro
/linux-master/drivers/clk/mediatek/
H A Dclk-mt7986-topckgen.c276 MUX_GATE_CLR_SET_UPD(CLK_TOP_U2U3_XHCI_SEL, "u2u3_xhci_sel",
H A Dclk-mt7981-topckgen.c384 MUX_GATE_CLR_SET_UPD(CLK_TOP_U2U3_XHCI_SEL, "u2u3_xhci_sel",

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