Searched refs:CLK_TOP_SENINF2 (Results 1 - 9 of 9) sorted by relevance

/linux-master/include/dt-bindings/clock/
H A Dmt6779-clk.h150 #define CLK_TOP_SENINF2 140 macro
H A Dmt8186-clk.h50 #define CLK_TOP_SENINF2 31 macro
H A Dmt8195-clk.h67 #define CLK_TOP_SENINF2 55 macro
/linux-master/scripts/dtc/include-prefixes/dt-bindings/clock/
H A Dmt6779-clk.h150 #define CLK_TOP_SENINF2 140 macro
H A Dmt8186-clk.h50 #define CLK_TOP_SENINF2 31 macro
H A Dmt8195-clk.h67 #define CLK_TOP_SENINF2 55 macro
/linux-master/drivers/clk/mediatek/
H A Dclk-mt8186-topckgen.c586 MUX_GATE_CLR_SET_UPD(CLK_TOP_SENINF2, "top_seninf2",
H A Dclk-mt6779.c737 MUX_GATE_CLR_SET_UPD(CLK_TOP_SENINF2, "seninf2_sel",
H A Dclk-mt8195-topckgen.c1007 MUX_GATE_CLR_SET_UPD(CLK_TOP_SENINF2, "top_seninf2",

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