Searched refs:CLK_TOP_SENINF1 (Results 1 - 12 of 12) sorted by relevance
| /linux-master/include/dt-bindings/clock/ |
| H A D | mt6779-clk.h | 149 #define CLK_TOP_SENINF1 139 macro
|
| H A D | mt8186-clk.h | 49 #define CLK_TOP_SENINF1 30 macro
|
| H A D | mediatek,mt8188-clk.h | 60 #define CLK_TOP_SENINF1 49 macro
|
| H A D | mt8195-clk.h | 66 #define CLK_TOP_SENINF1 54 macro
|
| /linux-master/scripts/dtc/include-prefixes/dt-bindings/clock/ |
| H A D | mt6779-clk.h | 149 #define CLK_TOP_SENINF1 139 macro
|
| H A D | mt8186-clk.h | 49 #define CLK_TOP_SENINF1 30 macro
|
| H A D | mediatek,mt8188-clk.h | 60 #define CLK_TOP_SENINF1 49 macro
|
| H A D | mt8195-clk.h | 66 #define CLK_TOP_SENINF1 54 macro
|
| /linux-master/drivers/clk/mediatek/ |
| H A D | clk-mt8186-topckgen.c | 584 MUX_GATE_CLR_SET_UPD(CLK_TOP_SENINF1, "top_seninf1",
|
| H A D | clk-mt8188-topckgen.c | 1071 MUX_GATE_CLR_SET_UPD(CLK_TOP_SENINF1, "top_seninf1",
|
| H A D | clk-mt6779.c | 734 MUX_GATE_CLR_SET_UPD(CLK_TOP_SENINF1, "seninf1_sel",
|
| H A D | clk-mt8195-topckgen.c | 1005 MUX_GATE_CLR_SET_UPD(CLK_TOP_SENINF1, "top_seninf1",
|
Completed in 315 milliseconds