Searched refs:CLK_TOP_P0_1MHZ (Results 1 - 6 of 6) sorted by relevance
| /linux-master/include/dt-bindings/clock/ |
| H A D | mt7629-clk.h | 23 #define CLK_TOP_P0_1MHZ 13 macro
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| H A D | mt7622-clk.h | 25 #define CLK_TOP_P0_1MHZ 13 macro
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| /linux-master/scripts/dtc/include-prefixes/dt-bindings/clock/ |
| H A D | mt7629-clk.h | 23 #define CLK_TOP_P0_1MHZ 13 macro
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| H A D | mt7622-clk.h | 25 #define CLK_TOP_P0_1MHZ 13 macro
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| /linux-master/drivers/clk/mediatek/ |
| H A D | clk-mt7622.c | 267 FACTOR(CLK_TOP_P0_1MHZ, "p0_1mhz", "eth1pll", 1, 500),
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| H A D | clk-mt7629.c | 366 FACTOR(CLK_TOP_P0_1MHZ, "p0_1mhz", "eth1pll", 1, 500),
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