Searched refs:CLK_TOP_NET1PLL_D5 (Results 1 - 6 of 6) sorted by relevance
| /linux-master/include/dt-bindings/clock/ |
| H A D | mt7986-clk.h | 40 #define CLK_TOP_NET1PLL_D5 17 macro
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| H A D | mediatek,mt7988-clk.h | 44 #define CLK_TOP_NET1PLL_D5 16 macro
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| /linux-master/scripts/dtc/include-prefixes/dt-bindings/clock/ |
| H A D | mt7986-clk.h | 40 #define CLK_TOP_NET1PLL_D5 17 macro
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| H A D | mediatek,mt7988-clk.h | 44 #define CLK_TOP_NET1PLL_D5 16 macro
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| /linux-master/drivers/clk/mediatek/ |
| H A D | clk-mt7986-topckgen.c | 47 FACTOR(CLK_TOP_NET1PLL_D5, "top_net1pll_d5", "net1pll", 1, 5),
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| H A D | clk-mt7988-topckgen.c | 40 FACTOR(CLK_TOP_NET1PLL_D5, "net1pll_d5", "net1pll", 1, 5),
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