Searched refs:CLK_TOP_MJC_SEL (Results 1 - 3 of 3) sorted by relevance

/linux-master/include/dt-bindings/clock/
H A Dmediatek,mt6795-clk.h112 #define CLK_TOP_MJC_SEL 101 macro
/linux-master/scripts/dtc/include-prefixes/dt-bindings/clock/
H A Dmediatek,mt6795-clk.h112 #define CLK_TOP_MJC_SEL 101 macro
/linux-master/drivers/clk/mediatek/
H A Dclk-mt6795-topckgen.c484 TOP_MUX_GATE(CLK_TOP_MJC_SEL, "mjc_sel", mjc_parents, 0x90, 24, 4, 31, 0),

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