Searched refs:CLK_TOP_DISP_SEL (Results 1 - 6 of 6) sorted by relevance

/linux-master/scripts/dtc/include-prefixes/dt-bindings/clock/
H A Dmt8135-clk.h80 #define CLK_TOP_DISP_SEL 69 macro
H A Dmt8192-clk.h16 #define CLK_TOP_DISP_SEL 4 macro
/linux-master/include/dt-bindings/clock/
H A Dmt8135-clk.h80 #define CLK_TOP_DISP_SEL 69 macro
H A Dmt8192-clk.h16 #define CLK_TOP_DISP_SEL 4 macro
/linux-master/drivers/clk/mediatek/
H A Dclk-mt8135.c364 MUX_GATE(CLK_TOP_DISP_SEL, "disp_sel", disp_parents, 0x0144, 24, 3, 31),
H A Dclk-mt8192.c560 MUX_GATE_CLR_SET_UPD(CLK_TOP_DISP_SEL, "disp_sel",

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