Searched refs:CLK_TOP_CSW_MUX_MFG_SEL (Results 1 - 3 of 3) sorted by relevance

/linux-master/include/dt-bindings/clock/
H A Dmt8167-clk.h55 #define CLK_TOP_CSW_MUX_MFG_SEL (CLK_TOP_NR_CLK + 31) macro
/linux-master/scripts/dtc/include-prefixes/dt-bindings/clock/
H A Dmt8167-clk.h55 #define CLK_TOP_CSW_MUX_MFG_SEL (CLK_TOP_NR_CLK + 31) macro
/linux-master/drivers/clk/mediatek/
H A Dclk-mt8167.c532 MUX(CLK_TOP_CSW_MUX_MFG_SEL, "csw_mux_mfg_sel", csw_mux_mfg_parents,

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