Searched refs:CLK_TOP_AUD_INTBUS (Results 1 - 12 of 12) sorted by relevance
| /linux-master/include/dt-bindings/clock/ |
| H A D | mt6779-clk.h | 23 #define CLK_TOP_AUD_INTBUS 13 macro
|
| H A D | mt8186-clk.h | 35 #define CLK_TOP_AUD_INTBUS 16 macro
|
| H A D | mediatek,mt8188-clk.h | 42 #define CLK_TOP_AUD_INTBUS 31 macro
|
| H A D | mt8195-clk.h | 46 #define CLK_TOP_AUD_INTBUS 34 macro
|
| /linux-master/scripts/dtc/include-prefixes/dt-bindings/clock/ |
| H A D | mt6779-clk.h | 23 #define CLK_TOP_AUD_INTBUS 13 macro
|
| H A D | mt8186-clk.h | 35 #define CLK_TOP_AUD_INTBUS 16 macro
|
| H A D | mediatek,mt8188-clk.h | 42 #define CLK_TOP_AUD_INTBUS 31 macro
|
| H A D | mt8195-clk.h | 46 #define CLK_TOP_AUD_INTBUS 34 macro
|
| /linux-master/drivers/clk/mediatek/ |
| H A D | clk-mt8186-topckgen.c | 543 MUX_GATE_CLR_SET_UPD(CLK_TOP_AUD_INTBUS, "top_aud_intbus",
|
| H A D | clk-mt8188-topckgen.c | 1028 MUX_GATE_CLR_SET_UPD(CLK_TOP_AUD_INTBUS, "top_aud_intbus",
|
| H A D | clk-mt6779.c | 700 MUX_GATE_CLR_SET_UPD(CLK_TOP_AUD_INTBUS, "aud_intbus_sel",
|
| H A D | clk-mt8195-topckgen.c | 955 MUX_GATE_CLR_SET_UPD(CLK_TOP_AUD_INTBUS, "top_aud_intbus",
|
Completed in 162 milliseconds