Searched refs:CLK_TOP_AUD2_SEL (Results 1 - 10 of 10) sorted by relevance

/linux-master/include/dt-bindings/clock/
H A Dmt7629-clk.h108 #define CLK_TOP_AUD2_SEL 98 macro
H A Dmt8516-clk.h177 #define CLK_TOP_AUD2_SEL 145 macro
H A Dmt7622-clk.h93 #define CLK_TOP_AUD2_SEL 81 macro
/linux-master/scripts/dtc/include-prefixes/dt-bindings/clock/
H A Dmt7629-clk.h108 #define CLK_TOP_AUD2_SEL 98 macro
H A Dmt8516-clk.h177 #define CLK_TOP_AUD2_SEL 145 macro
H A Dmt7622-clk.h93 #define CLK_TOP_AUD2_SEL 81 macro
/linux-master/drivers/clk/mediatek/
H A Dclk-mt7622.c448 MUX_GATE(CLK_TOP_AUD2_SEL, "aud2_sel", aud2_parents,
H A Dclk-mt8167.c586 MUX(CLK_TOP_AUD2_SEL, "aud2_sel", aud2_parents,
H A Dclk-mt8516.c397 MUX(CLK_TOP_AUD2_SEL, "aud2_sel", aud2_parents,
H A Dclk-mt7629.c518 MUX_GATE(CLK_TOP_AUD2_SEL, "aud2_sel", aud1_parents,

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