Searched refs:CLK_TOP_ARMPLL_DIV_PLL1 (Results 1 - 3 of 3) sorted by relevance

/linux-master/include/dt-bindings/clock/
H A Dmt8183-clk.h165 #define CLK_TOP_ARMPLL_DIV_PLL1 129 macro
/linux-master/scripts/dtc/include-prefixes/dt-bindings/clock/
H A Dmt8183-clk.h165 #define CLK_TOP_ARMPLL_DIV_PLL1 129 macro
/linux-master/drivers/clk/mediatek/
H A Dclk-mt8183.c645 GATE_TOP(CLK_TOP_ARMPLL_DIV_PLL1, "armpll_div_pll1", "mainpll", 4),

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