Searched refs:CLK_TOP_APLL_I2S5_M_SEL (Results 1 - 3 of 3) sorted by relevance

/linux-master/scripts/dtc/include-prefixes/dt-bindings/clock/
H A Dmt8192-clk.h76 #define CLK_TOP_APLL_I2S5_M_SEL 64 macro
/linux-master/include/dt-bindings/clock/
H A Dmt8192-clk.h76 #define CLK_TOP_APLL_I2S5_M_SEL 64 macro
/linux-master/drivers/clk/mediatek/
H A Dclk-mt8192.c694 MUX(CLK_TOP_APLL_I2S5_M_SEL, "apll_i2s5_m_sel", apll_i2s_m_parents, 0x320, 21, 1),

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