Searched refs:CLK_MM_DISP_PWM0_26M (Results 1 - 3 of 3) sorted by relevance

/linux-master/drivers/clk/mediatek/
H A Dclk-mt2712-mm.c76 GATE_MM1(CLK_MM_DISP_PWM0_26M, "mm_pwm0_26m", "pwm_sel", 1),
/linux-master/scripts/dtc/include-prefixes/dt-bindings/clock/
H A Dmt2712-clk.h332 #define CLK_MM_DISP_PWM0_26M 31 macro
/linux-master/include/dt-bindings/clock/
H A Dmt2712-clk.h332 #define CLK_MM_DISP_PWM0_26M 31 macro

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