Searched refs:CLK_GSCL0 (Results 1 - 6 of 6) sorted by relevance
| /linux-master/scripts/dtc/include-prefixes/dt-bindings/clock/ |
| H A D | exynos5250.h | 60 #define CLK_GSCL0 256 macro
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| H A D | exynos5420.h | 164 #define CLK_GSCL0 465 macro
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| /linux-master/include/dt-bindings/clock/ |
| H A D | exynos5250.h | 60 #define CLK_GSCL0 256 macro
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| H A D | exynos5420.h | 164 #define CLK_GSCL0 465 macro
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| /linux-master/drivers/clk/samsung/ |
| H A D | clk-exynos5250.c | 518 GATE(CLK_GSCL0, "gscl0", "mout_aclk266_gscl_sub", GATE_IP_GSCL, 0, 0,
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| H A D | clk-exynos5420.c | 1252 GATE(CLK_GSCL0, "gscl0", "aclk300_gscl", GATE_IP_GSCL0, 0, 0, 0),
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Completed in 117 milliseconds