Searched refs:reg (Results 1 - 25 of 392) sorted by relevance

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/haiku-fatelf/src/bin/gdb/gdb/regformats/
H A Dregdef.h24 struct reg struct
44 void set_register_cache (struct reg *regs, int n);
/haiku-fatelf/src/add-ons/accelerants/3dfx/
H A D3dfx_edid.cpp23 uint32 reg = INREG32(VIDEO_SERIAL_PARALLEL_PORT); local
24 *_clock = (reg & VSP_SCL0_IN) ? 1 : 0;;
25 *data = (reg & VSP_SDA0_IN) ? 1 : 0;
35 uint32 reg = (INREG32(VIDEO_SERIAL_PARALLEL_PORT) local
37 reg = (reg | (_clock ? VSP_SCL0_OUT : 0) | (data ? VSP_SDA0_OUT : 0));
38 OUTREG32(VIDEO_SERIAL_PARALLEL_PORT, reg);
56 uint32 reg = INREG32(VIDEO_SERIAL_PARALLEL_PORT); local
57 OUTREG32(VIDEO_SERIAL_PARALLEL_PORT, reg | VSP_ENABLE_IIC0);
61 OUTREG32(VIDEO_SERIAL_PARALLEL_PORT, reg);
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/haiku-fatelf/src/bin/gdb/gdb/
H A Duser-regs.c62 user_reg_read_ftype *read, struct user_reg *reg)
67 gdb_assert (reg != NULL);
68 reg->name = name;
69 reg->read = read;
70 reg->next = NULL;
71 (*regs->last) = reg;
94 struct user_reg *reg; local
97 for (reg = builtin_user_regs.first; reg != NULL; reg
61 append_user_reg(struct gdb_user_regs *regs, const char *name, user_reg_read_ftype *read, struct user_reg *reg) argument
147 struct user_reg *reg; local
165 struct user_reg *reg; local
186 struct user_reg *reg = usernum_to_user_reg (gdbarch, regnum - maxregs); local
200 struct user_reg *reg = usernum_to_user_reg (gdbarch, regnum - maxregs); local
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H A Dhaiku-nat.h29 void haiku_supply_registers(int reg, const debug_cpu_state *cpuState);
30 void haiku_collect_registers(int reg, debug_cpu_state *cpuState);
H A Dppcobsd-nat.c29 #include <machine/reg.h>
43 struct reg regs;
59 struct reg regs;
82 ppcobsd_reg_offsets.r0_offset = offsetof (struct reg, gpr);
83 ppcobsd_reg_offsets.pc_offset = offsetof (struct reg, pc);
84 ppcobsd_reg_offsets.ps_offset = offsetof (struct reg, ps);
85 ppcobsd_reg_offsets.cr_offset = offsetof (struct reg, cnd);
86 ppcobsd_reg_offsets.lr_offset = offsetof (struct reg, lr);
87 ppcobsd_reg_offsets.ctr_offset = offsetof (struct reg, cnt);
88 ppcobsd_reg_offsets.xer_offset = offsetof (struct reg, xe
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H A Damd64-haiku-nat.c65 haiku_supply_registers(int reg, const debug_cpu_state *cpuState) argument
67 if (reg == -1) {
71 } else if (reg < AMD64_ST0_REGNUM) {
72 int offset = kHaikuAMD64RegOffset[reg];
73 regcache_raw_supply (current_regcache, reg, (char*)cpuState + offset);
82 haiku_collect_registers(int reg, debug_cpu_state *cpuState) argument
84 if (reg == -1) {
88 } else if (reg < AMD64_ST0_REGNUM) {
89 int offset = kHaikuAMD64RegOffset[reg];
90 regcache_raw_collect (current_regcache, reg, (cha
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H A Di386-haiku-nat.c56 haiku_supply_registers(int reg, const debug_cpu_state *cpuState) argument
58 if (reg == -1) {
62 } else if (reg < I386_ST0_REGNUM) {
63 int offset = kHaikuI386RegOffset[reg];
64 regcache_raw_supply (current_regcache, reg, (char*)cpuState + offset);
73 haiku_collect_registers(int reg, debug_cpu_state *cpuState) argument
75 if (reg == -1) {
79 } else if (reg < I386_ST0_REGNUM) {
80 int offset = kHaikuI386RegOffset[reg];
81 regcache_raw_collect (current_regcache, reg, (cha
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/haiku-fatelf/src/system/boot/platform/raspberrypi_arm/
H A Dmailbox.cpp18 convert_mailbox_reg(addr_t reg) argument
20 return gPeripheralBase + ARM_CTRL_0_MAILBOX_BASE + reg;
25 write_mailbox_reg(addr_t reg, uint32 value) argument
28 *(volatile uint32*)convert_mailbox_reg(reg) = value;
33 read_mailbox_reg(addr_t reg) argument
35 uint32 result = *(volatile uint32*)convert_mailbox_reg(reg);
/haiku-fatelf/src/add-ons/kernel/drivers/network/sis900/
H A Dinterface.h15 extern uint16 mdio_read(struct sis_info *info, uint16 reg);
16 extern uint16 mdio_readFromPHY(struct sis_info *info, uint16 phy, uint16 reg);
17 extern void mdio_write(struct sis_info *info, uint16 reg, uint16 value);
18 extern void mdio_writeToPHY(struct sis_info *info, uint16 phy, uint16 reg, uint16 value);
/haiku-fatelf/src/add-ons/kernel/drivers/network/wwan/usb_beceemwmx/
H A DBeceemDDR.h24 virtual status_t ReadRegister(uint32 reg, size_t size, argument
26 virtual status_t WriteRegister(uint32 reg, size_t size, argument
28 virtual status_t BizarroReadRegister(uint32 reg, argument
31 virtual status_t BizarroWriteRegister(uint32 reg, argument
H A DBeceemCPU.h27 virtual status_t ReadRegister(uint32 reg, size_t size, argument
29 virtual status_t WriteRegister(uint32 reg, size_t size, argument
31 virtual status_t BizarroReadRegister(uint32 reg, argument
34 virtual status_t BizarroWriteRegister(uint32 reg, argument
H A DBeceemLED.h31 virtual status_t ReadRegister(uint32 reg, argument
34 virtual status_t WriteRegister(uint32 reg, argument
37 virtual status_t BizarroReadRegister(uint32 reg, argument
40 virtual status_t BizarroWriteRegister(uint32 reg, argument
/haiku-fatelf/src/system/libroot/posix/glibc/include/arch/x86_64/
H A Dsysdep.h28 #define cfi_def_cfa(reg, off) .cfi_def_cfa reg, off
29 #define cfi_def_cfa_register(reg) .cfi_def_cfa_register reg
32 #define cfi_offset(reg, off) .cfi_offset reg, off
33 #define cfi_rel_offset(reg, off) .cfi_rel_offset reg, off
35 #define cfi_return_column(reg) .cfi_return_column reg
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/haiku-fatelf/src/add-ons/kernel/drivers/network/ipro1000/dev/e1000/
H A De1000_osdep.c44 e1000_write_pci_cfg(struct e1000_hw *hw, u32 reg, u16 *value) argument
46 pci_write_config(((struct e1000_osdep *)hw->back)->dev, reg, *value, 2);
50 e1000_read_pci_cfg(struct e1000_hw *hw, u32 reg, u16 *value) argument
52 *value = pci_read_config(((struct e1000_osdep *)hw->back)->dev, reg, 2);
73 e1000_read_pcie_cap_reg(struct e1000_hw *hw, u32 reg, u16 *value) argument
79 *value = pci_read_config(dev, offset + reg, 2);
87 e1000_write_pcie_cap_reg(struct e1000_hw *hw, u32 reg, u16 *value) argument
93 pci_write_config(dev, offset + reg, *value, 2);
H A De1000_osdep.h143 #define E1000_REGISTER(hw, reg) (((hw)->mac.type >= e1000_82543) \
144 ? reg : e1000_translate_register_82542(reg))
160 #define E1000_READ_REG(hw, reg) \
163 E1000_REGISTER(hw, reg))
165 #define E1000_WRITE_REG(hw, reg, value) \
168 E1000_REGISTER(hw, reg), value)
170 #define E1000_READ_REG_ARRAY(hw, reg, index) \
173 E1000_REGISTER(hw, reg) + ((index)<< 2))
175 #define E1000_WRITE_REG_ARRAY(hw, reg, inde
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/haiku-fatelf/src/add-ons/kernel/drivers/network/vt612x/dev/vge/
H A Dif_vgevar.h215 #define CSR_WRITE_STREAM_4(sc, reg, val) \
216 bus_write_stream_4(sc->vge_res, reg, val)
217 #define CSR_WRITE_4(sc, reg, val) \
218 bus_write_4(sc->vge_res, reg, val)
219 #define CSR_WRITE_2(sc, reg, val) \
220 bus_write_2(sc->vge_res, reg, val)
221 #define CSR_WRITE_1(sc, reg, val) \
222 bus_write_1(sc->vge_res, reg, val)
224 #define CSR_READ_4(sc, reg) \
225 bus_read_4(sc->vge_res, reg)
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/haiku-fatelf/src/apps/debugger/dwarf/
H A DCfaRule.h50 inline void SetToRegister(uint32 reg);
75 { return fRegisterOffset.reg; }
79 inline void SetToRegisterOffset(uint32 reg, uint64 offset);
82 inline void SetRegister(uint32 reg);
90 uint32 reg; member in struct:CfaCfaRule::__anon2931::__anon2932
138 CfaRule::SetToRegister(uint32 reg) argument
141 fRegister = reg;
181 CfaCfaRule::SetToRegisterOffset(uint32 reg, uint64 offset) argument
184 fRegisterOffset.reg = reg;
199 SetRegister(uint32 reg) argument
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/haiku-fatelf/src/system/kernel/arch/arm/
H A Darch_uart_8250.cpp10 #include <arch/arm/reg.h>
24 virtual void Out8(int reg, uint8 value);
25 virtual uint8 In8(int reg);
64 ArchUART8250::Out8(int reg, uint8 value) argument
66 *((uint8 *)Base() + reg * sizeof(uint32)) = value;
71 ArchUART8250::In8(int reg) argument
73 return *((uint8 *)Base() + reg * sizeof(uint32));
/haiku-fatelf/src/add-ons/kernel/drivers/network/wlan/ralink2860/dev/rt2860/
H A Drt2860_io.h37 uint32_t rt2860_io_mac_read(struct rt2860_softc *sc, uint16_t reg);
40 uint16_t reg, void *buf, size_t len);
43 uint16_t reg, uint32_t val);
46 uint16_t reg, const void *buf, size_t len);
49 uint16_t reg, uint32_t val, size_t len);
56 uint8_t rt2860_io_bbp_read(struct rt2860_softc *sc, uint8_t reg);
58 void rt2860_io_bbp_write(struct rt2860_softc *sc, uint8_t reg, uint8_t val);
60 void rt2860_io_rf_write(struct rt2860_softc *sc, uint8_t reg, uint32_t val);
62 int32_t rt2860_io_rf_read(struct rt2860_softc *sc, uint8_t reg);
/haiku-fatelf/src/add-ons/kernel/drivers/network/marvell_yukon/dev/mii/
H A De1000phy.c183 uint16_t reg, page; local
185 reg = PHY_READ(sc, E1000_SCR);
187 reg &= ~E1000_SCR_AUTO_X_MODE;
188 PHY_WRITE(sc, E1000_SCR, reg);
193 reg = PHY_READ(sc, E1000_SCR);
194 reg &= ~E1000_SCR_MODE_MASK;
195 reg |= E1000_SCR_MODE_1000BX;
196 PHY_WRITE(sc, E1000_SCR, reg);
200 reg = PHY_READ(sc, E1000_SCR);
201 reg |
301 int reg; local
481 uint16_t reg; local
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/haiku-fatelf/src/add-ons/kernel/drivers/network/syskonnect/dev/mii/
H A De1000phy.c183 uint16_t reg, page; local
185 reg = PHY_READ(sc, E1000_SCR);
187 reg &= ~E1000_SCR_AUTO_X_MODE;
188 PHY_WRITE(sc, E1000_SCR, reg);
193 reg = PHY_READ(sc, E1000_SCR);
194 reg &= ~E1000_SCR_MODE_MASK;
195 reg |= E1000_SCR_MODE_1000BX;
196 PHY_WRITE(sc, E1000_SCR, reg);
200 reg = PHY_READ(sc, E1000_SCR);
201 reg |
301 int reg; local
481 uint16_t reg; local
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/haiku-fatelf/headers/private/kernel/arch/generic/
H A Ddebug_uart.h44 virtual void Out8(int reg, uint8 value) argument
45 { *((uint8 *)Base() + reg) = value; }
46 virtual uint8 In8(int reg) argument
47 { return *((uint8 *)Base() + reg); }
/haiku-fatelf/src/libs/compat/freebsd_network/
H A Dmii.c19 __haiku_miibus_readreg(device_t device, int phy, int reg) argument
24 return device->methods.miibus_readreg(device, phy, reg);
29 __haiku_miibus_writereg(device_t device, int phy, int reg, int data) argument
34 return device->methods.miibus_writereg(device, phy, reg, data);
/haiku-fatelf/src/apps/debugger/arch/
H A DCpuState.h27 virtual bool GetRegisterValue(const Register* reg,
29 virtual bool SetRegisterValue(const Register* reg,
/haiku-fatelf/src/libs/compat/freebsd_network/compat/dev/mii/
H A Dmii_bitbang.h51 int phy, int reg);
54 int phy, int reg, int val);

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