Searched refs:MASK (Results 1 - 6 of 6) sorted by relevance

/haiku-fatelf/headers/private/graphics/vmware/
H A Dsvga_reg.h175 #define SVGA_ROP_ALL (MASK(SVGA_NUM_SUPPORTED_ROPS))
240 #define SVGA_BLENDFLAG_ALL (MASK(SVGA_NUM_BLENDFLAGS))
/haiku-fatelf/src/bin/gdb/gdb/
H A Ddcache.c115 #define MASK(x) ((x) & ~LINE_SIZE_MASK) macro
228 if (MASK (addr) == db->addr)
406 db->addr = MASK(addr);
/haiku-fatelf/src/bin/pcmcia-cs/
H A Dyacc_cis.y63 %token IRQ_NO MASK LEVEL PULSE SHARED
231 config: CONFIG BASE NUMBER MASK NUMBER LAST_INDEX NUMBER
341 | cftab IRQ_NO MASK NUMBER
/haiku-fatelf/src/bin/gdb/include/opcode/
H A Dm88k.h317 #define MASK MUL +4 macro
/haiku-fatelf/src/bin/gdb/opcodes/
H A Dm88k-dis.c156 {0x48000000,"mask ",{21,5,REG} ,{16,5,REG} ,{0,16,HEX}, {1,1,PINT,MASK ,i16bit,1,0,1,0,0,0,0,0,0,0,0} },
157 {0x4c000000,"mask.u ",{21,5,REG} ,{16,5,REG} ,{0,16,HEX}, {1,1,PINT,MASK ,i16bit,1,0,1,0,1,0,0,0,0,0,0} },
H A Diq2000-opc.c818 { { MNEM, ' ', OP (RD), ',', OP (RS), ',', OP (RT), ',', OP (MASK), 0 } },
824 { { MNEM, ' ', OP (RD_RS), ',', OP (RT), ',', OP (MASK), 0 } },

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