Searched refs:v13 (Results 1 - 25 of 25) sorted by relevance

/haiku-buildtools/gcc/gcc/testsuite/gfortran.dg/
H A Dvolatile9.f9016 integer :: v13 variable in module:mod13
22 volatile :: v13
26 volatile :: v13
34 volatile :: v13
41 volatile :: v13
/haiku-buildtools/gcc/gcc/testsuite/gcc.dg/
H A DWcxx-compat-17.c16 const struct s v13; /* { dg-warning "invalid in C\[+\]\[+\]" } */ local
H A Dc11-atomic-3.c125 _Atomic functiontype *v13; /* { dg-error "function type" } */ variable
/haiku-buildtools/gcc/gcc/testsuite/obj-c++.dg/
H A Divar-problem-1.mm28 int v13;
54 int v13;
/haiku-buildtools/gcc/gcc/testsuite/objc.dg/
H A Divar-problem-1.m27 int v13;
53 int v13;
/haiku-buildtools/gcc/gcc/testsuite/gcc.dg/format/
H A Dext-6.c13 va_list v9, va_list v10, va_list v11, va_list v12, va_list v13)
46 vsscanf (s, "%Y", v13); /* { dg-warning "format" "vsscanf" } */
11 foo(int i, char *s, size_t n, int *ip, va_list v0, va_list v1, va_list v2, va_list v3, va_list v4, va_list v5, va_list v6, va_list v7, va_list v8, va_list v9, va_list v10, va_list v11, va_list v12, va_list v13) argument
/haiku-buildtools/binutils/gas/testsuite/gas/ppc/
H A Daltivec.d41 7c: (7d a0 b3 ce|ce b3 a0 7d) stvxl v13,0,r22
54 b0: (12 ed 22 80|80 22 ed 12) vadduws v23,v13,v4
56 b8: (10 6d dc 04|04 dc 6d 10) vand v3,v13,v27
70 f0: (12 ed 6c c6|c6 6c ed 12) vcmpeqfp\. v23,v13,v13
79 114: (12 1c 6a c6|c6 6a 1c 12) vcmpgtfp v16,v28,v13
84 128: (12 13 6f 46|46 6f 13 12) vcmpgtsh\. v16,v19,v13
86 130: (12 ad 07 86|86 07 ad 12) vcmpgtsw\. v21,v13,v0
88 138: (10 ed 56 06|06 56 ed 10) vcmpgtub\. v7,v13,v10
100 168: (11 ad dc 0a|0a dc ad 11) vmaxfp v13,v1
[all...]
H A Daltivec2.d33 5c: (7d b7 e4 4a|4a e4 b7 7d) lvtrx v13,r23,r28
40 78: (7d a0 33 0a|0a 33 a0 7d) stvexbx v13,0,r6
41 7c: (7d b9 1b 0a|0a 1b b9 7d) stvexbx v13,r25,r3
50 a0: (7d a0 57 4a|4a 57 a0 7d) stvfrxl v13,0,r10
51 a4: (7d b1 cf 4a|4a cf b1 7d) stvfrxl v13,r17,r25
57 bc: (7d b7 3d ca|ca 3d b7 7d) stvswx v13,r23,r7
76 108: (11 bb f2 88|88 f2 bb 11) vmuleuw v13,v27,v30
80 118: (11 bc 0b c2|c2 0b bc 11) vminsd v13,v28,v1
94 150: (10 4d a5 09|09 a5 4d 10) vcipherlast v2,v13,v20
98 160: (12 94 6d 48|48 6d 94 12) vncipher v20,v20,v13
[all...]
H A Dvsx3.d90 .*: (f5 a0 00 03|03 00 a0 f5) stxssp v13,0\(0\)
100 .*: (ff 8d d9 08|08 d9 8d ff) xscmpoqp cr7,v13,v27
109 .*: (ff bd 6b c9|c9 6b bd ff) xsnmsubqpo v29,v29,v13
111 .*: (fd a8 0c 09|09 0c a8 fd) xssubqpo v13,v8,v1
120 .*: (fd 72 6e 48|48 6e 72 fd) xsxsigqp v11,v13
121 .*: (fd bb 76 48|48 76 bb fd) xssqrtqp v13,v14
131 .*: (fd b9 26 88|88 26 b9 fd) xscvqpsdz v13,v4
H A Daltivec3.d23 .*: (12 ad 51 87|87 51 ad 12) vcmpnezw v21,v13,v10
35 .*: (13 a7 6b cd|cd 6b a7 13) vinsertd v29,v13,7
66 .*: (11 ba ce 02|02 ce ba 11) vextsw2d v13,v25
H A Dpower9.d33 .*: (11 6c 6d c1|c1 6d 6c 11) bcdsr\. v11,v12,v13,0
34 .*: (11 6c 6f c1|c1 6f 6c 11) bcdsr\. v11,v12,v13,1
35 .*: (11 8d 74 c1|c1 74 8d 11) bcds\. v12,v13,v14,0
36 .*: (11 8d 76 c1|c1 76 8d 11) bcds\. v12,v13,v14,1
37 .*: (11 ae 7d 01|01 7d ae 11) bcdtrunc\. v13,v14,v15,0
38 .*: (11 ae 7f 01|01 7f ae 11) bcdtrunc\. v13,v14,v15,1
59 .*: (fd 8d 70 48|48 70 8d fd) xsmulqp v12,v13,v14
60 .*: (fd ae 78 49|49 78 ae fd) xsmulqpo v13,v14,v15
90 .*: (fd 88 6e 48|48 6e 88 fd) xsnabsqp v12,v13
91 .*: (fd b0 76 48|48 76 b0 fd) xsnegqp v13,v1
[all...]
H A Dpower8.d56 b8: (12 9d 68 88|88 68 9d 12) vmulouw v20,v29,v13
63 d4: (11 08 69 40|40 69 08 11) vaddcuq v8,v8,v13
79 114: (11 36 6c c8|c8 6c 36 11) vpmsumd v9,v22,v13
84 128: (12 e0 6d 0c|0c 6d e0 12) vgbbd v23,v13
93 14c: (10 ad 05 c8|c8 05 ad 10) vsbox v5,v13
102 170: (11 60 6e ce|ce 6e 60 11) vupklsw v11,v13
/haiku-buildtools/gcc/libstdc++-v3/testsuite/26_numerics/valarray/
H A D30416.cc120 valarray<int> v13; local
121 valarray<int> v13_ris(v13.cshift(-10));
122 VERIFY( comp_vala(v13, v13_ris) );
/haiku-buildtools/binutils/gas/testsuite/gas/aarch64/
H A Dverbose-error.l87 [^:]*:30: Error: operand mismatch -- `saddlp v12.8b,v13.8b'
89 [^:]*:30: Info: saddlp v12.4h, v13.8b
91 [^:]*:30: Info: saddlp v12.8h, v13.16b
92 [^:]*:30: Info: saddlp v12.2s, v13.4h
93 [^:]*:30: Info: saddlp v12.4s, v13.8h
94 [^:]*:30: Info: saddlp v12.1d, v13.2s
95 [^:]*:30: Info: saddlp v12.2d, v13.4s
H A Dneon-not.d56 c0: 2e2059ad mvn v13.8b, v13.8b
57 c4: 2e2059ad mvn v13.8b, v13.8b
58 c8: 6e2059ad mvn v13.16b, v13.16b
59 cc: 6e2059ad mvn v13.16b, v13.16b
H A Dneon-ins.d32 60: 4e011dad mov v13.b\[0\], w13
33 64: 4e011dad mov v13.b\[0\], w13
92 150: 4e031dad mov v13.b\[1\], w13
93 154: 4e031dad mov v13.b\[1\], w13
152 240: 4e051dad mov v13.b\[2\], w13
153 244: 4e051dad mov v13.b\[2\], w13
212 330: 4e071dad mov v13.b\[3\], w13
213 334: 4e071dad mov v13.b\[3\], w13
272 420: 4e091dad mov v13.b\[4\], w13
273 424: 4e091dad mov v13
[all...]
H A Dverbose-error.s30 saddlp v12.8b, v13.8b
/haiku-buildtools/gcc/libstdc++-v3/testsuite/26_numerics/random/mersenne_twister_engine/requirements/
H A Dconstexpr_data.cc60 constexpr auto v13 __attribute__((unused)) local
/haiku-buildtools/gcc/gcc/testsuite/g++.dg/opt/
H A Dpr23478.C166 C13<C7> v13 = xx9 (); local
191 return v13;
/haiku-buildtools/gcc/libstdc++-v3/testsuite/18_support/numeric_limits/requirements/
H A Dconstexpr_data.cc62 constexpr bool v13 __attribute__((unused)) local
/haiku-buildtools/gcc/gcc/testsuite/gcc.target/sparc/
H A Dultrasp13.c21 do { int tot = (((width) + (8) - 1) / (8)); int len = tot / 3; int rem = tot % 3; int y; unsigned int rc_gsr_scale_ __attribute__ ((__unused__)) = 7; unsigned int rc_gsr_align_ __attribute__ ((__unused__)) = 4; unsigned int rc_gsr_set_ __attribute__ ((__unused__)) = 0; register unsigned int rc_gsr_fakedep_ __attribute__ ((__unused__)) = 0; unsigned int rc_gsr_ldinit_ __attribute__ ((__unused__)) = 0; for (y = 0; y < (height); y++) { rc_vec_t v11, v12, v13; rc_vec_t v21, v22, v23; rc_vec_t v31, v32, v33; rc_vec_t s1, s2, s3; int j = y*(dst_dim); int i2 = y*(src_dim) + 8; int i1 = i2 - (src_dim); int i3 = i2 + (src_dim); int x; ((s1) = *(const rc_vec_t*)(&(src)[i1 - 2*8])); ((s2) = *(const rc_vec_t*)(&(src)[i2 - 2*8])); ((s3) = *(const rc_vec_t*)(&(src)[i3 - 2*8])); do { do { rc_vec_t s1_ = (s1); rc_vec_t dstv_; rc_vec4_type_ hi_, lo_; rc_vec4_type_ s1hi_, s1lo_; rc_vec4_type_ s2hi_, s2lo_; rc_svec_type_ hi1_, hi2_, lo1_, lo2_, his_, los_; do { if (rc_gsr_ldinit_) { extern void rc_mixing_GSR_setting_with_RC_VEC_LDINIT_(void); rc_mixing_GSR_setting_with_RC_VEC_LDINIT_(); } if (!__builtin_constant_p(rc_gsr_align_) || !__builtin_constant_p(2) || !rc_gsr_set_ || (unsigned) (rc_gsr_align_) != rc_gsr_align_ || (unsigned) (2) != rc_gsr_scale_) { rc_gsr_set_ = 1; rc_gsr_align_ = (rc_gsr_align_); rc_gsr_scale_ = (2); unsigned int val_ = (rc_gsr_scale_ << 3) | rc_gsr_align_; if (__builtin_constant_p (val_)) { __asm__("wr %%g0,%[gsrval],%%gsr\n" ";# dep %[depvec] on fake GSR %[fakegsr]" : [depvec] "=brm" (s1_), [fakegsr] "=rm" (rc_gsr_fakedep_) : "0" (s1_), [gsrval] "i" (val_), "1" (rc_gsr_fakedep_)); } else { __asm__("wr %[gsrval],0,%%gsr" "\n;# dep %[depvec] on fake GSR %[fakegsr]" : [depvec] "=brm" (s1_), [fakegsr] "=rm" (rc_gsr_fakedep_) : "0" (s1_), [gsrval] "r" (val_), "1" (rc_gsr_fakedep_)); } } else { __asm__("\n;# dep %[depvec] on fake GSR %[fakegsr]" : [depvec] "=brm" (s1_) : "0" (s1_), [fakegsr] "g" (rc_gsr_fakedep_)); } } while (0); do { typedef union { rc_vec_t v_; struct { rc_vec4_type_ hi_, lo_; } hilo_; } RC_hl_type_; RC_hl_type_ hl_ = (RC_hl_type_) (s1_); (s1hi_) = hl_.hilo_.hi_; (s1lo_) = hl_.hilo_.lo_; } while (0); do { typedef union { rc_vec_t v_; struct { rc_vec4_type_ hi_, lo_; } hilo_; } RC_hl_type_; RC_hl_type_ hl_ = (RC_hl_type_) (s3); (s2hi_) = hl_.hilo_.hi_; (s2lo_) = hl_.hilo_.lo_; } while (0); hi1_ = __builtin_vis_fexpand(s1hi_); lo1_ = __builtin_vis_fexpand(s1lo_); hi2_ = __builtin_vis_fexpand(s2hi_); lo2_ = __builtin_vis_fexpand(s2lo_); his_ = (hi1_) + (hi2_); los_ = (lo1_) + (lo2_); hi_ = __builtin_vis_fpack16(his_); lo_ = __builtin_vis_fpack16(los_); do { typedef union { struct { rc_vec4_type_ hi_, lo_; } hilo_; rc_vec_t v_; } RC_hl_type_; RC_hl_type_ hl_ = (RC_hl_type_) {{(hi_), (lo_)}}; (dstv_) = hl_.v_; } while (0); __asm__("\n;# dep fake GSR %[fakegsr] on %[xdep]" : [fakegsr] "=brm" (rc_gsr_fakedep_) : [xdep] "brm" (dstv_), "0" (rc_gsr_fakedep_)); (v11) = dstv_; } while (0); do { rc_vec_t s1_ = (v11); rc_vec_t dstv_; rc_vec4_type_ hi_, lo_; rc_vec4_type_ s1hi_, s1lo_; rc_vec4_type_ s2hi_, s2lo_; rc_svec_type_ hi1_, hi2_, lo1_, lo2_, his_, los_; do { if (rc_gsr_ldinit_) { extern void rc_mixing_GSR_setting_with_RC_VEC_LDINIT_(void); rc_mixing_GSR_setting_with_RC_VEC_LDINIT_(); } if (!__builtin_constant_p(rc_gsr_align_) || !__builtin_constant_p(2) || !rc_gsr_set_ || (unsigned) (rc_gsr_align_) != rc_gsr_align_ || (unsigned) (2) != rc_gsr_scale_) { rc_gsr_set_ = 1; rc_gsr_align_ = (rc_gsr_align_); rc_gsr_scale_ = (2); unsigned int val_ = (rc_gsr_scale_ << 3) | rc_gsr_align_; if (__builtin_constant_p (val_)) { __asm__("wr %%g0,%[gsrval],%%gsr\n" ";# dep %[depvec] on fake GSR %[fakegsr]" : [depvec] "=brm" (s1_), [fakegsr] "=rm" (rc_gsr_fakedep_) : "0" (s1_), [gsrval] "i" (val_), "1" (rc_gsr_fakedep_)); } else { __asm__("wr %[gsrval],0,%%gsr" "\n;# dep %[depvec] on fake GSR %[fakegsr]" : [depvec] "=brm" (s1_), [fakegsr] "=rm" (rc_gsr_fakedep_) : "0" (s1_), [gsrval] "r" (val_), "1" (rc_gsr_fakedep_)); } } else { __asm__("\n;# dep %[depvec] on fake GSR %[fakegsr]" : [depvec] "=brm" (s1_) : "0" (s1_), [fakegsr] "g" (rc_gsr_fakedep_)); } } while (0); do { typedef union { rc_vec_t v_; struct { rc_vec4_type_ hi_, lo_; } hilo_; } RC_hl_type_; RC_hl_type_ hl_ = (RC_hl_type_) (s1_); (s1hi_) = hl_.hilo_.hi_; (s1lo_) = hl_.hilo_.lo_; } while (0); do { typedef union { rc_vec_t v_; struct { rc_vec4_type_ hi_, lo_; } hilo_; } RC_hl_type_; RC_hl_type_ hl_ = (RC_hl_type_) (s2); (s2hi_) = hl_.hilo_.hi_; (s2lo_) = hl_.hilo_.lo_; } while (0); hi1_ = __builtin_vis_fexpand(s1hi_); lo1_ = __builtin_vis_fexpand(s1lo_); hi2_ = __builtin_vis_fexpand(s2hi_); lo2_ = __builtin_vis_fexpand(s2lo_); his_ = (hi1_) + (hi2_) + (rc_svec_type_){(16), (16), (16), (16)}; los_ = (lo1_) + (lo2_) + (rc_svec_type_){(16), (16), (16), (16)}; hi_ = __builtin_vis_fpack16(his_); lo_ = __builtin_vis_fpack16(los_); do { typedef union { struct { rc_vec4_type_ hi_, lo_; } hilo_; rc_vec_t v_; } RC_hl_type_; RC_hl_type_ hl_ = (RC_hl_type_) {{(hi_), (lo_)}}; (dstv_) = hl_.v_; } while (0); __asm__("\n;# dep fake GSR %[fakegsr] on %[xdep]" : [fakegsr] "=brm" (rc_gsr_fakedep_) : [xdep] "brm" (dstv_), "0" (rc_gsr_fakedep_)); (v21) = dstv_; } while (0); do { rc_vec_t s1_ = (v11); rc_vec_t dstv_; rc_vec4_type_ hi_, lo_; rc_vec4_type_ s1hi_, s1lo_; rc_vec4_type_ s2hi_, s2lo_; rc_svec_type_ hi1_, hi2_, lo1_, lo2_, his_, los_; do { if (rc_gsr_ldinit_) { extern void rc_mixing_GSR_setting_with_RC_VEC_LDINIT_(void); rc_mixing_GSR_setting_with_RC_VEC_LDINIT_(); } if (!__builtin_constant_p(rc_gsr_align_) || !__builtin_constant_p(2) || !rc_gsr_set_ || (unsigned) (rc_gsr_align_) != rc_gsr_align_ || (unsigned) (2) != rc_gsr_scale_) { rc_gsr_set_ = 1; rc_gsr_align_ = (rc_gsr_align_); rc_gsr_scale_ = (2); unsigned int val_ = (rc_gsr_scale_ << 3) | rc_gsr_align_; if (__builtin_constant_p (val_)) { __asm__("wr %%g0,%[gsrval],%%gsr\n" ";# dep %[depvec] on fake GSR %[fakegsr]" : [depvec] "=brm" (s1_), [fakegsr] "=rm" (rc_gsr_fakedep_) : "0" (s1_), [gsrval] "i" (val_), "1" (rc_gsr_fakedep_)); } else { __asm__("wr %[gsrval],0,%%gsr" "\n;# dep %[depvec] on fake GSR %[fakegsr]" : [depvec] "=brm" (s1_), [fakegsr] "=rm" (rc_gsr_fakedep_) : "0" (s1_), [gsrval] "r" (val_), "1" (rc_gsr_fakedep_)); } } else { __asm__("\n;# dep %[depvec] on fake GSR %[fakegsr]" : [depvec] "=brm" (s1_) : "0" (s1_), [fakegsr] "g" (rc_gsr_fakedep_)); } } while (0); do { typedef union { rc_vec_t v_; struct { rc_vec4_type_ hi_, lo_; } hilo_; } RC_hl_type_; RC_hl_type_ hl_ = (RC_hl_type_) (s1_); (s1hi_) = hl_.hilo_.hi_; (s1lo_) = hl_.hilo_.lo_; } while (0); do { typedef union { rc_vec_t v_; struct { rc_vec4_type_ hi_, lo_; } hilo_; } RC_hl_type_; RC_hl_type_ hl_ = (RC_hl_type_) (s2); (s2hi_) = hl_.hilo_.hi_; (s2lo_) = hl_.hilo_.lo_; } while (0); hi1_ = __builtin_vis_fexpand(s1hi_); lo1_ = __builtin_vis_fexpand(s1lo_); hi2_ = __builtin_vis_fexpand(s2hi_); lo2_ = __builtin_vis_fexpand(s2lo_); his_ = (hi1_) + (hi2_); los_ = (lo1_) + (lo2_); hi_ = __builtin_vis_fpack16(his_); lo_ = __builtin_vis_fpack16(los_); do { typedef union { struct { rc_vec4_type_ hi_, lo_; } hilo_; rc_vec_t v_; } RC_hl_type_; RC_hl_type_ hl_ = (RC_hl_type_) {{(hi_), (lo_)}}; (dstv_) = hl_.v_; } while (0); __asm__("\n;# dep fake GSR %[fakegsr] on %[xdep]" : [fakegsr] "=brm" (rc_gsr_fakedep_) : [xdep] "brm" (dstv_), "0" (rc_gsr_fakedep_)); (v11) = dstv_; } while (0); } while (0); ((s1) = *(const rc_vec_t*)(&(src)[i1 - 8])); ((s2) = *(const rc_vec_t*)(&(src)[i2 - 8])); ((s3) = *(const rc_vec_t*)(&(src)[i3 - 8])); do { do { rc_vec_t s1_ = (s1); rc_vec_t dstv_; rc_vec4_type_ hi_, lo_; rc_vec4_type_ s1hi_, s1lo_; rc_vec4_type_ s2hi_, s2lo_; rc_svec_type_ hi1_, hi2_, lo1_, lo2_, his_, los_; do { if (rc_gsr_ldinit_) { extern void rc_mixing_GSR_setting_with_RC_VEC_LDINIT_(void); rc_mixing_GSR_setting_with_RC_VEC_LDINIT_(); } if (!__builtin_constant_p(rc_gsr_align_) || !__builtin_constant_p(2) || !rc_gsr_set_ || (unsigned) (rc_gsr_align_) != rc_gsr_align_ || (unsigned) (2) != rc_gsr_scale_) { rc_gsr_set_ = 1; rc_gsr_align_ = (rc_gsr_align_); rc_gsr_scale_ = (2); unsigned int val_ = (rc_gsr_scale_ << 3) | rc_gsr_align_; if (__builtin_constant_p (val_)) { __asm__("wr %%g0,%[gsrval],%%gsr\n" ";# dep %[depvec] on fake GSR %[fakegsr]" : [depvec] "=brm" (s1_), [fakegsr] "=rm" (rc_gsr_fakedep_) : "0" (s1_), [gsrval] "i" (val_), "1" (rc_gsr_fakedep_)); } else { __asm__("wr %[gsrval],0,%%gsr" "\n;# dep %[depvec] on fake GSR %[fakegsr]" : [depvec] "=brm" (s1_), [fakegsr] "=rm" (rc_gsr_fakedep_) : "0" (s1_), [gsrval] "r" (val_), "1" (rc_gsr_fakedep_)); } } else { __asm__("\n;# dep %[depvec] on fake GSR %[fakegsr]" : [depvec] "=brm" (s1_) : "0" (s1_), [fakegsr] "g" (rc_gsr_fakedep_)); } } while (0); do { typedef union { rc_vec_t v_; struct { rc_vec4_type_ hi_, lo_; } hilo_; } RC_hl_type_; RC_hl_type_ hl_ = (RC_hl_type_) (s1_); (s1hi_) = hl_.hilo_.hi_; (s1lo_) = hl_.hilo_.lo_; } while (0); do { typedef union { rc_vec_t v_; struct { rc_vec4_type_ hi_, lo_; } hilo_; } RC_hl_type_; RC_hl_type_ hl_ = (RC_hl_type_) (s3); (s2hi_) = hl_.hilo_.hi_; (s2lo_) = hl_.hilo_.lo_; } while (0); hi1_ = __builtin_vis_fexpand(s1hi_); lo1_ = __builtin_vis_fexpand(s1lo_); hi2_ = __builtin_vis_fexpand(s2hi_); lo2_ = __builtin_vis_fexpand(s2lo_); his_ = (hi1_) + (hi2_); los_ = (lo1_) + (lo2_); hi_ = __builtin_vis_fpack16(his_); lo_ = __builtin_vis_fpack16(los_); do { typedef union { struct { rc_vec4_type_ hi_, lo_; } hilo_; rc_vec_t v_; } RC_hl_type_; RC_hl_type_ hl_ = (RC_hl_type_) {{(hi_), (lo_)}}; (dstv_) = hl_.v_; } while (0); __asm__("\n;# dep fake GSR %[fakegsr] on %[xdep]" : [fakegsr] "=brm" (rc_gsr_fakedep_) : [xdep] "brm" (dstv_), "0" (rc_gsr_fakedep_)); (v12) = dstv_; } while (0); do { rc_vec_t s1_ = (v12); rc_vec_t dstv_; rc_vec4_type_ hi_, lo_; rc_vec4_type_ s1hi_, s1lo_; rc_vec4_type_ s2hi_, s2lo_; rc_svec_type_ hi1_, hi2_, lo1_, lo2_, his_, los_; do { if (rc_gsr_ldinit_) { extern void rc_mixing_GSR_setting_with_RC_VEC_LDINIT_(void); rc_mixing_GSR_setting_with_RC_VEC_LDINIT_(); } if (!__builtin_constant_p(rc_gsr_align_) || !__builtin_constant_p(2) || !rc_gsr_set_ || (unsigned) (rc_gsr_align_) != rc_gsr_align_ || (unsigned) (2) != rc_gsr_scale_) { rc_gsr_set_ = 1; rc_gsr_align_ = (rc_gsr_align_); rc_gsr_scale_ = (2); unsigned int val_ = (rc_gsr_scale_ << 3) | rc_gsr_align_; if (__builtin_constant_p (val_)) { __asm__("wr %%g0,%[gsrval],%%gsr\n" ";# dep %[depvec] on fake GSR %[fakegsr]" : [depvec] "=brm" (s1_), [fakegsr] "=rm" (rc_gsr_fakedep_) : "0" (s1_), [gsrval] "i" (val_), "1" (rc_gsr_fakedep_)); } else { __asm__("wr %[gsrval],0,%%gsr" "\n;# dep %[depvec] on fake GSR %[fakegsr]" : [depvec] "=brm" (s1_), [fakegsr] "=rm" (rc_gsr_fakedep_) : "0" (s1_), [gsrval] "r" (val_), "1" (rc_gsr_fakedep_)); } } else { __asm__("\n;# dep %[depvec] on fake GSR %[fakegsr]" : [depvec] "=brm" (s1_) : "0" (s1_), [fakegsr] "g" (rc_gsr_fakedep_)); } } while (0); do { typedef union { rc_vec_t v_; struct { rc_vec4_type_ hi_, lo_; } hilo_; } RC_hl_type_; RC_hl_type_ hl_ = (RC_hl_type_) (s1_); (s1hi_) = hl_.hilo_.hi_; (s1lo_) = hl_.hilo_.lo_; } while (0); do { typedef union { rc_vec_t v_; struct { rc_vec4_type_ hi_, lo_; } hilo_; } RC_hl_type_; RC_hl_type_ hl_ = (RC_hl_type_) (s2); (s2hi_) = hl_.hilo_.hi_; (s2lo_) = hl_.hilo_.lo_; } while (0); hi1_ = __builtin_vis_fexpand(s1hi_); lo1_ = __builtin_vis_fexpand(s1lo_); hi2_ = __builtin_vis_fexpand(s2hi_); lo2_ = __builtin_vis_fexpand(s2lo_); his_ = (hi1_) + (hi2_) + (rc_svec_type_){(16), (16), (16), (16)}; los_ = (lo1_) + (lo2_) + (rc_svec_type_){(16), (16), (16), (16)}; hi_ = __builtin_vis_fpack16(his_); lo_ = __builtin_vis_fpack16(los_); do { typedef union { struct { rc_vec4_type_ hi_, lo_; } hilo_; rc_vec_t v_; } RC_hl_type_; RC_hl_type_ hl_ = (RC_hl_type_) {{(hi_), (lo_)}}; (dstv_) = hl_.v_; } while (0); __asm__("\n;# dep fake GSR %[fakegsr] on %[xdep]" : [fakegsr] "=brm" (rc_gsr_fakedep_) : [xdep] "brm" (dstv_), "0" (rc_gsr_fakedep_)); (v22) = dstv_; } while (0); do { rc_vec_t s1_ = (v12); rc_vec_t dstv_; rc_vec4_type_ hi_, lo_; rc_vec4_type_ s1hi_, s1lo_; rc_vec4_type_ s2hi_, s2lo_; rc_svec_type_ hi1_, hi2_, lo1_, lo2_, his_, los_; do { if (rc_gsr_ldinit_) { extern void rc_mixing_GSR_setting_with_RC_VEC_LDINIT_(void); rc_mixing_GSR_setting_with_RC_VEC_LDINIT_(); } if (!__builtin_constant_p(rc_gsr_align_) || !__builtin_constant_p(2) || !rc_gsr_set_ || (unsigned) (rc_gsr_align_) != rc_gsr_align_ || (unsigned) (2) != rc_gsr_scale_) { rc_gsr_set_ = 1; rc_gsr_align_ = (rc_gsr_align_); rc_gsr_scale_ = (2); unsigned int val_ = (rc_gsr_scale_ << 3) | rc_gsr_align_; if (__builtin_constant_p (val_)) { __asm__("wr %%g0,%[gsrval],%%gsr\n" ";# dep %[depvec] on fake GSR %[fakegsr]" : [depvec] "=brm" (s1_), [fakegsr] "=rm" (rc_gsr_fakedep_) : "0" (s1_), [gsrval] "i" (val_), "1" (rc_gsr_fakedep_)); } else { __asm__("wr %[gsrval],0,%%gsr" "\n;# dep %[depvec] on fake GSR %[fakegsr]" : [depvec] "=brm" (s1_), [fakegsr] "=rm" (rc_gsr_fakedep_) : "0" (s1_), [gsrval] "r" (val_), "1" (rc_gsr_fakedep_)); } } else { __asm__("\n;# dep %[depvec] on fake GSR %[fakegsr]" : [depvec] "=brm" (s1_) : "0" (s1_), [fakegsr] "g" (rc_gsr_fakedep_)); } } while (0); do { typedef union { rc_vec_t v_; struct { rc_vec4_type_ hi_, lo_; } hilo_; } RC_hl_type_; RC_hl_type_ hl_ = (RC_hl_type_) (s1_); (s1hi_) = hl_.hilo_.hi_; (s1lo_) = hl_.hilo_.lo_; } while (0); do { typedef union { rc_vec_t v_; struct { rc_vec4_type_ hi_, lo_; } hilo_; } RC_hl_type_; RC_hl_type_ hl_ = (RC_hl_type_) (s2); (s2hi_) = hl_.hilo_.hi_; (s2lo_) = hl_.hilo_.lo_; } while (0); hi1_ = __builtin_vis_fexpand(s1hi_); lo1_ = __builtin_vis_fexpand(s1lo_); hi2_ = __builtin_vis_fexpand(s2hi_); lo2_ = __builtin_vis_fexpand(s2lo_); his_ = (hi1_) + (hi2_); los_ = (lo1_) + (lo2_); hi_ = __builtin_vis_fpack16(his_); lo_ = __builtin_vis_fpack16(los_); do { typedef union { struct { rc_vec4_type_ hi_, lo_; } hilo_; rc_vec_t v_; } RC_hl_type_; RC_hl_type_ hl_ = (RC_hl_type_) {{(hi_), (lo_)}}; (dstv_) = hl_.v_; } while (0); __asm__("\n;# dep fake GSR %[fakegsr] on %[xdep]" : [fakegsr] "=brm" (rc_gsr_fakedep_) : [xdep] "brm" (dstv_), "0" (rc_gsr_fakedep_)); (v12) = dstv_; } while (0); } while (0); ((v13) = ((rc_vec_t) {0})); ((v23) = ((rc_vec_t) {0})); ((v33) = ((rc_vec_t) {0})); (void)v21, (void)v22; (void)v31, (void)v32; for (x = 0; x < len; x++) { do { rc_vec_t p1, p2, p3, sum; ((p1) = *(const rc_vec_t*)(&(src)[i1])); ((p2) = *(const rc_vec_t*)(&(src)[i2])); ((p3) = *(const rc_vec_t*)(&(src)[i3])); do { do { rc_vec_t s1_ = (p1); rc_vec_t dstv_; rc_vec4_type_ hi_, lo_; rc_vec4_type_ s1hi_, s1lo_; rc_vec4_type_ s2hi_, s2lo_; rc_svec_type_ hi1_, hi2_, lo1_, lo2_, his_, los_; do { if (rc_gsr_ldinit_) { extern void rc_mixing_GSR_setting_with_RC_VEC_LDINIT_(void); rc_mixing_GSR_setting_with_RC_VEC_LDINIT_(); } if (!__builtin_constant_p(rc_gsr_align_) || !__builtin_constant_p(2) || !rc_gsr_set_ || (unsigned) (rc_gsr_align_) != rc_gsr_align_ || (unsigned) (2) != rc_gsr_scale_) { rc_gsr_set_ = 1; rc_gsr_align_ = (rc_gsr_align_); rc_gsr_scale_ = (2); unsigned int val_ = (rc_gsr_scale_ << 3) | rc_gsr_align_; if (__builtin_constant_p (val_)) { __asm__("wr %%g0,%[gsrval],%%gsr\n" ";# dep %[depvec] on fake GSR %[fakegsr]" : [depvec] "=brm" (s1_), [fakegsr] "=rm" (rc_gsr_fakedep_) : "0" (s1_), [gsrval] "i" (val_), "1" (rc_gsr_fakedep_)); } else { __asm__("wr %[gsrval],0,%%gsr" "\n;# dep %[depvec] on fake GSR %[fakegsr]" : [depvec] "=brm" (s1_), [fakegsr] "=rm" (rc_gsr_fakedep_) : "0" (s1_), [gsrval] "r" (val_), "1" (rc_gsr_fakedep_)); } } else { __asm__("\n;# dep %[depvec] on fake GSR %[fakegsr]" : [depvec] "=brm" (s1_) : "0" (s1_), [fakegsr] "g" (rc_gsr_fakedep_)); } } while (0); do { typedef union { rc_vec_t v_; struct { rc_vec4_type_ hi_, lo_; } hilo_; } RC_hl_type_; RC_hl_type_ hl_ = (RC_hl_type_) (s1_); (s1hi_) = hl_.hilo_.hi_; (s1lo_) = hl_.hilo_.lo_; } while (0); do { typedef union { rc_vec_t v_; struct { rc_vec4_type_ hi_, lo_; } hilo_; } RC_hl_type_; RC_hl_type_ hl_ = (RC_hl_type_) (p3); (s2hi_) = hl_.hilo_.hi_; (s2lo_) = hl_.hilo_.lo_; } while (0); hi1_ = __builtin_vis_fexpand(s1hi_); lo1_ = __builtin_vis_fexpand(s1lo_); hi2_ = __builtin_vis_fexpand(s2hi_); lo2_ = __builtin_vis_fexpand(s2lo_); his_ = (hi1_) + (hi2_); los_ = (lo1_) + (lo2_); hi_ = __builtin_vis_fpack16(his_); lo_ = __builtin_vis_fpack16(los_); do { typedef union { struct { rc_vec4_type_ hi_, lo_; } hilo_; rc_vec_t v_; } RC_hl_type_; RC_hl_type_ hl_ = (RC_hl_type_) {{(hi_), (lo_)}}; (dstv_) = hl_.v_; } while (0); __asm__("\n;# dep fake GSR %[fakegsr] on %[xdep]" : [fakegsr] "=brm" (rc_gsr_fakedep_) : [xdep] "brm" (dstv_), "0" (rc_gsr_fakedep_)); (v13) = dstv_; } while (0); do { rc_vec_t s1_ = (v13); rc_vec_t dstv_; rc_vec4_type_ hi_, lo_; rc_vec4_type_ s1hi_, s1lo_; rc_vec4_type_ s2hi_, s2lo_; rc_svec_type_ hi1_, hi2_, lo1_, lo2_, his_, los_; do { if (rc_gsr_ldinit_) { extern void rc_mixing_GSR_setting_with_RC_VEC_LDINIT_(void); rc_mixing_GSR_setting_with_RC_VEC_LDINIT_(); } if (!__builtin_constant_p(rc_gsr_align_) || !__builtin_constant_p(2) || !rc_gsr_set_ || (unsigned) (rc_gsr_align_) != rc_gsr_align_ || (unsigned) (2) != rc_gsr_scale_) { rc_gsr_set_ = 1; rc_gsr_align_ = (rc_gsr_align_); rc_gsr_scale_ = (2); unsigned int val_ = (rc_gsr_scale_ << 3) | rc_gsr_align_; if (__builtin_constant_p (val_)) { __asm__("wr %%g0,%[gsrval],%%gsr\n" ";# dep %[depvec] on fake GSR %[fakegsr]" : [depvec] "=brm" (s1_), [fakegsr] "=rm" (rc_gsr_fakedep_) : "0" (s1_), [gsrval] "i" (val_), "1" (rc_gsr_fakedep_)); } else { __asm__("wr %[gsrval],0,%%gsr" "\n;# dep %[depvec] on fake GSR %[fakegsr]" : [depvec] "=brm" (s1_), [fakegsr] "=rm" (rc_gsr_fakedep_) : "0" (s1_), [gsrval] "r" (val_), "1" (rc_gsr_fakedep_)); } } else { __asm__("\n;# dep %[depvec] on fake GSR %[fakegsr]" : [depvec] "=brm" (s1_) : "0" (s1_), [fakegsr] "g" (rc_gsr_fakedep_)); } } while (0); do { typedef union { rc_vec_t v_; struct { rc_vec4_type_ hi_, lo_; } hilo_; } RC_hl_type_; RC_hl_type_ hl_ = (RC_hl_type_) (s1_); (s1hi_) = hl_.hilo_.hi_; (s1lo_) = hl_.hilo_.lo_; } while (0); do { typedef union { rc_vec_t v_; struct { rc_vec4_type_ hi_, lo_; } hilo_; } RC_hl_type_; RC_hl_type_ hl_ = (RC_hl_type_) (p2); (s2hi_) = hl_.hilo_.hi_; (s2lo_) = hl_.hilo_.lo_; } while (0); hi1_ = __builtin_vis_fexpand(s1hi_); lo1_ = __builtin_vis_fexpand(s1lo_); hi2_ = __builtin_vis_fexpand(s2hi_); lo2_ = __builtin_vis_fexpand(s2lo_); his_ = (hi1_) + (hi2_) + (rc_svec_type_){(16), (16), (16), (16)}; los_ = (lo1_) + (lo2_) + (rc_svec_type_){(16), (16), (16), (16)}; hi_ = __builtin_vis_fpack16(his_); lo_ = __builtin_vis_fpack16(los_); do { typedef union { struct { rc_vec4_type_ hi_, lo_; } hilo_; rc_vec_t v_; } RC_hl_type_; RC_hl_type_ hl_ = (RC_hl_type_) {{(hi_), (lo_)}}; (dstv_) = hl_.v_; } while (0); __asm__("\n;# dep fake GSR %[fakegsr] on %[xdep]" : [fakegsr] "=brm" (rc_gsr_fakedep_) : [xdep] "brm" (dstv_), "0" (rc_gsr_fakedep_)); (v23) = dstv_; } while (0); do { rc_vec_t s1_ = (v13); rc_vec_t dstv_; rc_vec4_type_ hi_, lo_; rc_vec4_type_ s1hi_, s1lo_; rc_vec4_type_ s2hi_, s2lo_; rc_svec_type_ hi1_, hi2_, lo1_, lo2_, his_, los_; do { if (rc_gsr_ldinit_) { extern void rc_mixing_GSR_setting_with_RC_VEC_LDINIT_(void); rc_mixing_GSR_setting_with_RC_VEC_LDINIT_(); } if (!__builtin_constant_p(rc_gsr_align_) || !__builtin_constant_p(2) || !rc_gsr_set_ || (unsigned) (rc_gsr_align_) != rc_gsr_align_ || (unsigned) (2) != rc_gsr_scale_) { rc_gsr_set_ = 1; rc_gsr_align_ = (rc_gsr_align_); rc_gsr_scale_ = (2); unsigned int val_ = (rc_gsr_scale_ << 3) | rc_gsr_align_; if (__builtin_constant_p (val_)) { __asm__("wr %%g0,%[gsrval],%%gsr\n" ";# dep %[depvec] on fake GSR %[fakegsr]" : [depvec] "=brm" (s1_), [fakegsr] "=rm" (rc_gsr_fakedep_) : "0" (s1_), [gsrval] "i" (val_), "1" (rc_gsr_fakedep_)); } else { __asm__("wr %[gsrval],0,%%gsr" "\n;# dep %[depvec] on fake GSR %[fakegsr]" : [depvec] "=brm" (s1_), [fakegsr] "=rm" (rc_gsr_fakedep_) : "0" (s1_), [gsrval] "r" (val_), "1" (rc_gsr_fakedep_)); } } else { __asm__("\n;# dep %[depvec] on fake GSR %[fakegsr]" : [depvec] "=brm" (s1_) : "0" (s1_), [fakegsr] "g" (rc_gsr_fakedep_)); } } while (0); do { typedef union { rc_vec_t v_; struct { rc_vec4_type_ hi_, lo_; } hilo_; } RC_hl_type_; RC_hl_type_ hl_ = (RC_hl_type_) (s1_); (s1hi_) = hl_.hilo_.hi_; (s1lo_) = hl_.hilo_.lo_; } while (0); do { typedef union { rc_vec_t v_; struct { rc_vec4_type_ hi_, lo_; } hilo_; } RC_hl_type_; RC_hl_type_ hl_ = (RC_hl_type_) (p2); (s2hi_) = hl_.hilo_.hi_; (s2lo_) = hl_.hilo_.lo_; } while (0); hi1_ = __builtin_vis_fexpand(s1hi_); lo1_ = __builtin_vis_fexpand(s1lo_); hi2_ = __builtin_vis_fexpand(s2hi_); lo2_ = __builtin_vis_fexpand(s2lo_); his_ = (hi1_) + (hi2_); los_ = (lo1_) + (lo2_); hi_ = __builtin_vis_fpack16(his_); lo_ = __builtin_vis_fpack16(los_); do { typedef union { struct { rc_vec4_type_ hi_, lo_; } hilo_; rc_vec_t v_; } RC_hl_type_; RC_hl_type_ hl_ = (RC_hl_type_) {{(hi_), (lo_)}}; (dstv_) = hl_.v_; } while (0); __asm__("\n;# dep fake GSR %[fakegsr] on %[xdep]" : [fakegsr] "=brm" (rc_gsr_fakedep_) : [xdep] "brm" (dstv_), "0" (rc_gsr_fakedep_)); (v13) = dstv_; } while (0); } while (0); do { rc_vec_t u12, u23; do { rc_vec_t shv_; do { rc_vec_t v_ = (v12); do { if (rc_gsr_ldinit_) { extern void rc_mixing_GSR_setting_with_RC_VEC_LDINIT_(void); rc_mixing_GSR_setting_with_RC_VEC_LDINIT_(); } if (!__builtin_constant_p(8 - 1) || !__builtin_constant_p(rc_gsr_scale_) || !rc_gsr_set_ || (unsigned) (8 - 1) != rc_gsr_align_ || (unsigned) (rc_gsr_scale_) != rc_gsr_scale_) { rc_gsr_set_ = 1; rc_gsr_align_ = (8 - 1); rc_gsr_scale_ = (rc_gsr_scale_); unsigned int val_ = (rc_gsr_scale_ << 3) | rc_gsr_align_; if (__builtin_constant_p (val_)) { __asm__("wr %%g0,%[gsrval],%%gsr\n" ";# dep %[depvec] on fake GSR %[fakegsr]" : [depvec] "=brm" (v_), [fakegsr] "=rm" (rc_gsr_fakedep_) : "0" (v_), [gsrval] "i" (val_), "1" (rc_gsr_fakedep_)); } else { __asm__("wr %[gsrval],0,%%gsr" "\n;# dep %[depvec] on fake GSR %[fakegsr]" : [depvec] "=brm" (v_), [fakegsr] "=rm" (rc_gsr_fakedep_) : "0" (v_), [gsrval] "r" (val_), "1" (rc_gsr_fakedep_)); } } else { __asm__("\n;# dep %[depvec] on fake GSR %[fakegsr]" : [depvec] "=brm" (v_) : "0" (v_), [fakegsr] "g" (rc_gsr_fakedep_)); } } while (0); (shv_) = v_; } while (0); do { rc_vec_t dstv_ = __builtin_vis_faligndatav8qi(v11, shv_); __asm__("\n;# dep fake GSR %[fakegsr] on %[xdep]" : [fakegsr] "=brm" (rc_gsr_fakedep_) : [xdep] "brm" (dstv_), "0" (rc_gsr_fakedep_)); (u12) = dstv_; } while (0); } while (0); do { rc_vec_t shv_; do { rc_vec_t v_ = (v23); do { if (rc_gsr_ldinit_) { extern void rc_mixing_GSR_setting_with_RC_VEC_LDINIT_(void); rc_mixing_GSR_setting_with_RC_VEC_LDINIT_(); } if (!__builtin_constant_p(1) || !__builtin_constant_p(rc_gsr_scale_) || !rc_gsr_set_ || (unsigned) (1) != rc_gsr_align_ || (unsigned) (rc_gsr_scale_) != rc_gsr_scale_) { rc_gsr_set_ = 1; rc_gsr_align_ = (1); rc_gsr_scale_ = (rc_gsr_scale_); unsigned int val_ = (rc_gsr_scale_ << 3) | rc_gsr_align_; if (__builtin_constant_p (val_)) { __asm__("wr %%g0,%[gsrval],%%gsr\n" ";# dep %[depvec] on fake GSR %[fakegsr]" : [depvec] "=brm" (v_), [fakegsr] "=rm" (rc_gsr_fakedep_) : "0" (v_), [gsrval] "i" (val_), "1" (rc_gsr_fakedep_)); } else { __asm__("wr %[gsrval],0,%%gsr" "\n;# dep %[depvec] on fake GSR %[fakegsr]" : [depvec] "=brm" (v_), [fakegsr] "=rm" (rc_gsr_fakedep_) : "0" (v_), [gsrval] "r" (val_), "1" (rc_gsr_fakedep_)); } } else { __asm__("\n;# dep %[depvec] on fake GSR %[fakegsr]" : [depvec] "=brm" (v_) : "0" (v_), [fakegsr] "g" (rc_gsr_fakedep_)); } } while (0); (shv_) = v_; } while (0); do { rc_vec_t dstv_ = __builtin_vis_faligndatav8qi(v22, shv_); __asm__("\n;# dep fake GSR %[fakegsr] on %[xdep]" : [fakegsr] "=brm" (rc_gsr_fakedep_) : [xdep] "brm" (dstv_), "0" (rc_gsr_fakedep_)); (u23) = dstv_; } while (0); } while (0); do { rc_vec_t s1_ = (u23); rc_vec_t dstv_; rc_vec4_type_ hi_, lo_; rc_vec4_type_ s1hi_, s1lo_; rc_vec4_type_ s2hi_, s2lo_; rc_svec_type_ hi1_, hi2_, lo1_, lo2_, his_, los_; do { if (rc_gsr_ldinit_) { extern void rc_mixing_GSR_setting_with_RC_VEC_LDINIT_(void); rc_mixing_GSR_setting_with_RC_VEC_LDINIT_(); } if (!__builtin_constant_p(rc_gsr_align_) || !__builtin_constant_p(2) || !rc_gsr_set_ || (unsigned) (rc_gsr_align_) != rc_gsr_align_ || (unsigned) (2) != rc_gsr_scale_) { rc_gsr_set_ = 1; rc_gsr_align_ = (rc_gsr_align_); rc_gsr_scale_ = (2); unsigned int val_ = (rc_gsr_scale_ << 3) | rc_gsr_align_; if (__builtin_constant_p (val_)) { __asm__("wr %%g0,%[gsrval],%%gsr\n" ";# dep %[depvec] on fake GSR %[fakegsr]" : [depvec] "=brm" (s1_), [fakegsr] "=rm" (rc_gsr_fakedep_) : "0" (s1_), [gsrval] "i" (val_), "1" (rc_gsr_fakedep_)); } else { __asm__("wr %[gsrval],0,%%gsr" "\n;# dep %[depvec] on fake GSR %[fakegsr]" : [depvec] "=brm" (s1_), [fakegsr] "=rm" (rc_gsr_fakedep_) : "0" (s1_), [gsrval] "r" (val_), "1" (rc_gsr_fakedep_)); } } else { __asm__("\n;# dep %[depvec] on fake GSR %[fakegsr]" : [depvec] "=brm" (s1_) : "0" (s1_), [fakegsr] "g" (rc_gsr_fakedep_)); } } while (0); do { typedef union { rc_vec_t v_; struct { rc_vec4_type_ hi_, lo_; } hilo_; } RC_hl_type_; RC_hl_type_ hl_ = (RC_hl_type_) (s1_); (s1hi_) = hl_.hilo_.hi_; (s1lo_) = hl_.hilo_.lo_; } while (0); do { typedef union { rc_vec_t v_; struct { rc_vec4_type_ hi_, lo_; } hilo_; } RC_hl_type_; RC_hl_type_ hl_ = (RC_hl_type_) (u12); (s2hi_) = hl_.hilo_.hi_; (s2lo_) = hl_.hilo_.lo_; } while (0); hi1_ = __builtin_vis_fexpand(s1hi_); lo1_ = __builtin_vis_fexpand(s1lo_); hi2_ = __builtin_vis_fexpand(s2hi_); lo2_ = __builtin_vis_fexpand(s2lo_); his_ = ((hi1_) - (hi2_) + (rc_svec_type_){(256*16), (256*16), (256*16), (256*16)}); los_ = ((lo1_) - (lo2_) + (rc_svec_type_){(256*16), (256*16), (256*16), (256*16)}); hi_ = __builtin_vis_fpack16(his_); lo_ = __builtin_vis_fpack16(los_); do { typedef union { struct { rc_vec4_type_ hi_, lo_; } hilo_; rc_vec_t v_; } RC_hl_type_; RC_hl_type_ hl_ = (RC_hl_type_) {{(hi_), (lo_)}}; (dstv_) = hl_.v_; } while (0); __asm__("\n;# dep fake GSR %[fakegsr] on %[xdep]" : [fakegsr] "=brm" (rc_gsr_fakedep_) : [xdep] "brm" (dstv_), "0" (rc_gsr_fakedep_)); (sum) = dstv_; } while (0); } while (0); (*(rc_vec_t*)(&(dst)[j]) = (sum)); (i1) += 8; (i2) += 8; (i3) += 8; (j) += 8; } while (0); do { rc_vec_t p1, p2, p3, sum; ((p1) = *(const rc_vec_t*)(&(src)[i1])); ((p2) = *(const rc_vec_t*)(&(src)[i2])); ((p3) = *(const rc_vec_t*)(&(src)[i3])); do { do { rc_vec_t s1_ = (p1); rc_vec_t dstv_; rc_vec4_type_ hi_, lo_; rc_vec4_type_ s1hi_, s1lo_; rc_vec4_type_ s2hi_, s2lo_; rc_svec_type_ hi1_, hi2_, lo1_, lo2_, his_, los_; do { if (rc_gsr_ldinit_) { extern void rc_mixing_GSR_setting_with_RC_VEC_LDINIT_(void); rc_mixing_GSR_setting_with_RC_VEC_LDINIT_(); } if (!__builtin_constant_p(rc_gsr_align_) || !__builtin_constant_p(2) || !rc_gsr_set_ || (unsigned) (rc_gsr_align_) != rc_gsr_align_ || (unsigned) (2) != rc_gsr_scale_) { rc_gsr_set_ = 1; rc_gsr_align_ = (rc_gsr_align_); rc_gsr_scale_ = (2); unsigned int val_ = (rc_gsr_scale_ << 3) | rc_gsr_align_; if (__builtin_constant_p (val_)) { __asm__("wr %%g0,%[gsrval],%%gsr\n" ";# dep %[depvec] on fake GSR %[fakegsr]" : [depvec] "=brm" (s1_), [fakegsr] "=rm" (rc_gsr_fakedep_) : "0" (s1_), [gsrval] "i" (val_), "1" (rc_gsr_fakedep_)); } else { __asm__("wr %[gsrval],0,%%gsr" "\n;# dep %[depvec] on fake GSR %[fakegsr]" : [depvec] "=brm" (s1_), [fakegsr] "=rm" (rc_gsr_fakedep_) : "0" (s1_), [gsrval] "r" (val_), "1" (rc_gsr_fakedep_)); } } else { __asm__("\n;# dep %[depvec] on fake GSR %[fakegsr]" : [depvec] "=brm" (s1_) : "0" (s1_), [fakegsr] "g" (rc_gsr_fakedep_)); } } while (0); do { typedef union { rc_vec_t v_; struct { rc_vec4_type_ hi_, lo_; } hilo_; } RC_hl_type_; RC_hl_type_ hl_ = (RC_hl_type_) (s1_); (s1hi_) = hl_.hilo_.hi_; (s1lo_) = hl_.hilo_.lo_; } while (0); do { typedef union { rc_vec_t v_; struct { rc_vec4_type_ hi_, lo_; } hilo_; } RC_hl_type_; RC_hl_type_ hl_ = (RC_hl_type_) (p3); (s2hi_) = hl_.hilo_.hi_; (s2lo_) = hl_.hilo_.lo_; } while (0); hi1_ = __builtin_vis_fexpand(s1hi_); lo1_ = __builtin_vis_fexpand(s1lo_); hi2_ = __builtin_vis_fexpand(s2hi_); lo2_ = __builtin_vis_fexpand(s2lo_); his_ = (hi1_) + (hi2_); los_ = (lo1_) + (lo2_); hi_ = __builtin_vis_fpack16(his_); lo_ = __builtin_vis_fpack16(los_); do { typedef union { struct { rc_vec4_type_ hi_, lo_; } hilo_; rc_vec_t v_; } RC_hl_type_; RC_hl_type_ hl_ = (RC_hl_type_) {{(hi_), (lo_)}}; (dstv_) = hl_.v_; } while (0); __asm__("\n;# dep fake GSR %[fakegsr] on %[xdep]" : [fakegsr] "=brm" (rc_gsr_fakedep_) : [xdep] "brm" (dstv_), "0" (rc_gsr_fakedep_)); (v11) = dstv_; } while (0); do { rc_vec_t s1_ = (v11); rc_vec_t dstv_; rc_vec4_type_ hi_, lo_; rc_vec4_type_ s1hi_, s1lo_; rc_vec4_type_ s2hi_, s2lo_; rc_svec_type_ hi1_, hi2_, lo1_, lo2_, his_, los_; do { if (rc_gsr_ldinit_) { extern void rc_mixing_GSR_setting_with_RC_VEC_LDINIT_(void); rc_mixing_GSR_setting_with_RC_VEC_LDINIT_(); } if (!__builtin_constant_p(rc_gsr_align_) || !__builtin_constant_p(2) || !rc_gsr_set_ || (unsigned) (rc_gsr_align_) != rc_gsr_align_ || (unsigned) (2) != rc_gsr_scale_) { rc_gsr_set_ = 1; rc_gsr_align_ = (rc_gsr_align_); rc_gsr_scale_ = (2); unsigned int val_ = (rc_gsr_scale_ << 3) | rc_gsr_align_; if (__builtin_constant_p (val_)) { __asm__("wr %%g0,%[gsrval],%%gsr\n" ";# dep %[depvec] on fake GSR %[fakegsr]" : [depvec] "=brm" (s1_), [fakegsr] "=rm" (rc_gsr_fakedep_) : "0" (s1_), [gsrval] "i" (val_), "1" (rc_gsr_fakedep_)); } else { __asm__("wr %[gsrval],0,%%gsr" "\n;# dep %[depvec] on fake GSR %[fakegsr]" : [depvec] "=brm" (s1_), [fakegsr] "=rm" (rc_gsr_fakedep_) : "0" (s1_), [gsrval] "r" (val_), "1" (rc_gsr_fakedep_)); } } else { __asm__("\n;# dep %[depvec] on fake GSR %[fakegsr]" : [depvec] "=brm" (s1_) : "0" (s1_), [fakegsr] "g" (rc_gsr_fakedep_)); } } while (0); do { typedef union { rc_vec_t v_; struct { rc_vec4_type_ hi_, lo_; } hilo_; } RC_hl_type_; RC_hl_type_ hl_ = (RC_hl_type_) (s1_); (s1hi_) = hl_.hilo_.hi_; (s1lo_) = hl_.hilo_.lo_; } while (0); do { typedef union { rc_vec_t v_; struct { rc_vec4_type_ hi_, lo_; } hilo_; } RC_hl_type_; RC_hl_type_ hl_ = (RC_hl_type_) (p2); (s2hi_) = hl_.hilo_.hi_; (s2lo_) = hl_.hilo_.lo_; } while (0); hi1_ = __builtin_vis_fexpand(s1hi_); lo1_ = __builtin_vis_fexpand(s1lo_); hi2_ = __builtin_vis_fexpand(s2hi_); lo2_ = __builtin_vis_fexpand(s2lo_); his_ = (hi1_) + (hi2_) + (rc_svec_type_){(16), (16), (16), (16)}; los_ = (lo1_) + (lo2_) + (rc_svec_type_){(16), (16), (16), (16)}; hi_ = __builtin_vis_fpack16(his_); lo_ = __builtin_vis_fpack16(los_); do { typedef union { struct { rc_vec4_type_ hi_, lo_; } hilo_; rc_vec_t v_; } RC_hl_type_; RC_hl_type_ hl_ = (RC_hl_type_) {{(hi_), (lo_)}}; (dstv_) = hl_.v_; } while (0); __asm__("\n;# dep fake GSR %[fakegsr] on %[xdep]" : [fakegsr] "=brm" (rc_gsr_fakedep_) : [xdep] "brm" (dstv_), "0" (rc_gsr_fakedep_)); (v21) = dstv_; } while (0); do { rc_vec_t s1_ = (v11); rc_vec_t dstv_; rc_vec4_type_ hi_, lo_; rc_vec4_type_ s1hi_, s1lo_; rc_vec4_type_ s2hi_, s2lo_; rc_svec_type_ hi1_, hi2_, lo1_, lo2_, his_, los_; do { if (rc_gsr_ldinit_) { extern void rc_mixing_GSR_setting_with_RC_VEC_LDINIT_(void); rc_mixing_GSR_setting_with_RC_VEC_LDINIT_(); } if (!__builtin_constant_p(rc_gsr_align_) || !__builtin_constant_p(2) || !rc_gsr_set_ || (unsigned) (rc_gsr_align_) != rc_gsr_align_ || (unsigned) (2) != rc_gsr_scale_) { rc_gsr_set_ = 1; rc_gsr_align_ = (rc_gsr_align_); rc_gsr_scale_ = (2); unsigned int val_ = (rc_gsr_scale_ << 3) | rc_gsr_align_; if (__builtin_constant_p (val_)) { __asm__("wr %%g0,%[gsrval],%%gsr\n" ";# dep %[depvec] on fake GSR %[fakegsr]" : [depvec] "=brm" (s1_), [fakegsr] "=rm" (rc_gsr_fakedep_) : "0" (s1_), [gsrval] "i" (val_), "1" (rc_gsr_fakedep_)); } else { __asm__("wr %[gsrval],0,%%gsr" "\n;# dep %[depvec] on fake GSR %[fakegsr]" : [depvec] "=brm" (s1_), [fakegsr] "=rm" (rc_gsr_fakedep_) : "0" (s1_), [gsrval] "r" (val_), "1" (rc_gsr_fakedep_)); } } else { __asm__("\n;# dep %[depvec] on fake GSR %[fakegsr]" : [depvec] "=brm" (s1_) : "0" (s1_), [fakegsr] "g" (rc_gsr_fakedep_)); } } while (0); do { typedef union { rc_vec_t v_; struct { rc_vec4_type_ hi_, lo_; } hilo_; } RC_hl_type_; RC_hl_type_ hl_ = (RC_hl_type_) (s1_); (s1hi_) = hl_.hilo_.hi_; (s1lo_) = hl_.hilo_.lo_; } while (0); do { typedef union { rc_vec_t v_; struct { rc_vec4_type_ hi_, lo_; } hilo_; } RC_hl_type_; RC_hl_type_ hl_ = (RC_hl_type_) (p2); (s2hi_) = hl_.hilo_.hi_; (s2lo_) = hl_.hilo_.lo_; } while (0); hi1_ = __builtin_vis_fexpand(s1hi_); lo1_ = __builtin_vis_fexpand(s1lo_); hi2_ = __builtin_vis_fexpand(s2hi_); lo2_ = __builtin_vis_fexpand(s2lo_); his_ = (hi1_) + (hi2_); los_ = (lo1_) + (lo2_); hi_ = __builtin_vis_fpack16(his_); lo_ = __builtin_vis_fpack16(los_); do { typedef union { struct { rc_vec4_type_ hi_, lo_; } hilo_; rc_vec_t v_; } RC_hl_type_; RC_hl_type_ hl_ = (RC_hl_type_) {{(hi_), (lo_)}}; (dstv_) = hl_.v_; } while (0); __asm__("\n;# dep fake GSR %[fakegsr] on %[xdep]" : [fakegsr] "=brm" (rc_gsr_fakedep_) : [xdep] "brm" (dstv_), "0" (rc_gsr_fakedep_)); (v11) = dstv_; } while (0); } while (0); do { rc_vec_t u12, u23; do { rc_vec_t shv_; do { rc_vec_t v_ = (v13); do { if (rc_gsr_ldinit_) { extern void rc_mixing_GSR_setting_with_RC_VEC_LDINIT_(void); rc_mixing_GSR_setting_with_RC_VEC_LDINIT_(); } if (!__builtin_constant_p(8 - 1) || !__builtin_constant_p(rc_gsr_scale_) || !rc_gsr_set_ || (unsigned) (8 - 1) != rc_gsr_align_ || (unsigned) (rc_gsr_scale_) != rc_gsr_scale_) { rc_gsr_set_ = 1; rc_gsr_align_ = (8 - 1); rc_gsr_scale_ = (rc_gsr_scale_); unsigned int val_ = (rc_gsr_scale_ << 3) | rc_gsr_align_; if (__builtin_constant_p (val_)) { __asm__("wr %%g0,%[gsrval],%%gsr\n" ";# dep %[depvec] on fake GSR %[fakegsr]" : [depvec] "=brm" (v_), [fakegsr] "=rm" (rc_gsr_fakedep_) : "0" (v_), [gsrval] "i" (val_), "1" (rc_gsr_fakedep_)); } else { __asm__("wr %[gsrval],0,%%gsr" "\n;# dep %[depvec] on fake GSR %[fakegsr]" : [depvec] "=brm" (v_), [fakegsr] "=rm" (rc_gsr_fakedep_) : "0" (v_), [gsrval] "r" (val_), "1" (rc_gsr_fakedep_)); } } else { __asm__("\n;# dep %[depvec] on fake GSR %[fakegsr]" : [depvec] "=brm" (v_) : "0" (v_), [fakegsr] "g" (rc_gsr_fakedep_)); } } while (0); (shv_) = v_; } while (0); do { rc_vec_t dstv_ = __builtin_vis_faligndatav8qi(v12, shv_); __asm__("\n;# dep fake GSR %[fakegsr] on %[xdep]" : [fakegsr] "=brm" (rc_gsr_fakedep_) : [xdep] "brm" (dstv_), "0" (rc_gsr_fakedep_)); (u12) = dstv_; } while (0); } while (0); do { rc_vec_t shv_; do { rc_vec_t v_ = (v21); do { if (rc_gsr_ldinit_) { extern void rc_mixing_GSR_setting_with_RC_VEC_LDINIT_(void); rc_mixing_GSR_setting_with_RC_VEC_LDINIT_(); } if (!__builtin_constant_p(1) || !__builtin_constant_p(rc_gsr_scale_) || !rc_gsr_set_ || (unsigned) (1) != rc_gsr_align_ || (unsigned) (rc_gsr_scale_) != rc_gsr_scale_) { rc_gsr_set_ = 1; rc_gsr_align_ = (1); rc_gsr_scale_ = (rc_gsr_scale_); unsigned int val_ = (rc_gsr_scale_ << 3) | rc_gsr_align_; if (__builtin_constant_p (val_)) { __asm__("wr %%g0,%[gsrval],%%gsr\n" ";# dep %[depvec] on fake GSR %[fakegsr]" : [depvec] "=brm" (v_), [fakegsr] "=rm" (rc_gsr_fakedep_) : "0" (v_), [gsrval] "i" (val_), "1" (rc_gsr_fakedep_)); } else { __asm__("wr %[gsrval],0,%%gsr" "\n;# dep %[depvec] on fake GSR %[fakegsr]" : [depvec] "=brm" (v_), [fakegsr] "=rm" (rc_gsr_fakedep_) : "0" (v_), [gsrval] "r" (val_), "1" (rc_gsr_fakedep_)); } } else { __asm__("\n;# dep %[depvec] on fake GSR %[fakegsr]" : [depvec] "=brm" (v_) : "0" (v_), [fakegsr] "g" (rc_gsr_fakedep_)); } } while (0); (shv_) = v_; } while (0); do { rc_vec_t dstv_ = __builtin_vis_faligndatav8qi(v23, shv_); __asm__("\n;# dep fake GSR %[fakegsr] on %[xdep]" : [fakegsr] "=brm" (rc_gsr_fakedep_) : [xdep] "brm" (dstv_), "0" (rc_gsr_fakedep_)); (u23) = dstv_; } while (0); } while (0); do { rc_vec_t s1_ = (u23); rc_vec_t dstv_; rc_vec4_type_ hi_, lo_; rc_vec4_type_ s1hi_, s1lo_; rc_vec4_type_ s2hi_, s2lo_; rc_svec_type_ hi1_, hi2_, lo1_, lo2_, his_, los_; do { if (rc_gsr_ldinit_) { extern void rc_mixing_GSR_setting_with_RC_VEC_LDINIT_(void); rc_mixing_GSR_setting_with_RC_VEC_LDINIT_(); } if (!__builtin_constant_p(rc_gsr_align_) || !__builtin_constant_p(2) || !rc_gsr_set_ || (unsigned) (rc_gsr_align_) != rc_gsr_align_ || (unsigned) (2) != rc_gsr_scale_) { rc_gsr_set_ = 1; rc_gsr_align_ = (rc_gsr_align_); rc_gsr_scale_ = (2); unsigned int val_ = (rc_gsr_scale_ << 3) | rc_gsr_align_; if (__builtin_constant_p (val_)) { __asm__("wr %%g0,%[gsrval],%%gsr\n" ";# dep %[depvec] on fake GSR %[fakegsr]" : [depvec] "=brm" (s1_), [fakegsr] "=rm" (rc_gsr_fakedep_) : "0" (s1_), [gsrval] "i" (val_), "1" (rc_gsr_fakedep_)); } else { __asm__("wr %[gsrval],0,%%gsr" "\n;# dep %[depvec] on fake GSR %[fakegsr]" : [depvec] "=brm" (s1_), [fakegsr] "=rm" (rc_gsr_fakedep_) : "0" (s1_), [gsrval] "r" (val_), "1" (rc_gsr_fakedep_)); } } else { __asm__("\n;# dep %[depvec] on fake GSR %[fakegsr]" : [depvec] "=brm" (s1_) : "0" (s1_), [fakegsr] "g" (rc_gsr_fakedep_)); } } while (0); do { typedef union { rc_vec_t v_; struct { rc_vec4_type_ hi_, lo_; } hilo_; } RC_hl_type_; RC_hl_type_ hl_ = (RC_hl_type_) (s1_); (s1hi_) = hl_.hilo_.hi_; (s1lo_) = hl_.hilo_.lo_; } while (0); do { typedef union { rc_vec_t v_; struct { rc_vec4_type_ hi_, lo_; } hilo_; } RC_hl_type_; RC_hl_type_ hl_ = (RC_hl_type_) (u12); (s2hi_) = hl_.hilo_.hi_; (s2lo_) = hl_.hilo_.lo_; } while (0); hi1_ = __builtin_vis_fexpand(s1hi_); lo1_ = __builtin_vis_fexpand(s1lo_); hi2_ = __builtin_vis_fexpand(s2hi_); lo2_ = __builtin_vis_fexpand(s2lo_); his_ = ((hi1_) - (hi2_) + (rc_svec_type_){(256*16), (256*16), (256*16), (256*16)}); los_ = ((lo1_) - (lo2_) + (rc_svec_type_){(256*16), (256*16), (256*16), (256*16)}); hi_ = __builtin_vis_fpack16(his_); lo_ = __builtin_vis_fpack16(los_); do { typedef union { struct { rc_vec4_type_ hi_, lo_; } hilo_; rc_vec_t v_; } RC_hl_type_; RC_hl_type_ hl_ = (RC_hl_type_) {{(hi_), (lo_)}}; (dstv_) = hl_.v_; } while (0); __asm__("\n;# dep fake GSR %[fakegsr] on %[xdep]" : [fakegsr] "=brm" (rc_gsr_fakedep_) : [xdep] "brm" (dstv_), "0" (rc_gsr_fakedep_)); (sum) = dstv_; } while (0); } while (0); (*(rc_vec_t*)(&(dst)[j]) = (sum)); (i1) += 8; (i2) += 8; (i3) += 8; (j) += 8; } while (0); do { rc_vec_t p1, p2, p3, sum; ((p1) = *(const rc_vec_t*)(&(src)[i1])); ((p2) = *(const rc_vec_t*)(&(src)[i2])); ((p3) = *(const rc_vec_t*)(&(src)[i3])); do { do { rc_vec_t s1_ = (p1); rc_vec_t dstv_; rc_vec4_type_ hi_, lo_; rc_vec4_type_ s1hi_, s1lo_; rc_vec4_type_ s2hi_, s2lo_; rc_svec_type_ hi1_, hi2_, lo1_, lo2_, his_, los_; do { if (rc_gsr_ldinit_) { extern void rc_mixing_GSR_setting_with_RC_VEC_LDINIT_(void); rc_mixing_GSR_setting_with_RC_VEC_LDINIT_(); } if (!__builtin_constant_p(rc_gsr_align_) || !__builtin_constant_p(2) || !rc_gsr_set_ || (unsigned) (rc_gsr_align_) != rc_gsr_align_ || (unsigned) (2) != rc_gsr_scale_) { rc_gsr_set_ = 1; rc_gsr_align_ = (rc_gsr_align_); rc_gsr_scale_ = (2); unsigned int val_ = (rc_gsr_scale_ << 3) | rc_gsr_align_; if (__builtin_constant_p (val_)) { __asm__("wr %%g0,%[gsrval],%%gsr\n" ";# dep %[depvec] on fake GSR %[fakegsr]" : [depvec] "=brm" (s1_), [fakegsr] "=rm" (rc_gsr_fakedep_) : "0" (s1_), [gsrval] "i" (val_), "1" (rc_gsr_fakedep_)); } else { __asm__("wr %[gsrval],0,%%gsr" "\n;# dep %[depvec] on fake GSR %[fakegsr]" : [depvec] "=brm" (s1_), [fakegsr] "=rm" (rc_gsr_fakedep_) : "0" (s1_), [gsrval] "r" (val_), "1" (rc_gsr_fakedep_)); } } else { __asm__("\n;# dep %[depvec] on fake GSR %[fakegsr]" : [depvec] "=brm" (s1_) : "0" (s1_), [fakegsr] "g" (rc_gsr_fakedep_)); } } while (0); do { typedef union { rc_vec_t v_; struct { rc_vec4_type_ hi_, lo_; } hilo_; } RC_hl_type_; RC_hl_type_ hl_ = (RC_hl_type_) (s1_); (s1hi_) = hl_.hilo_.hi_; (s1lo_) = hl_.hilo_.lo_; } while (0); do { typedef union { rc_vec_t v_; struct { rc_vec4_type_ hi_, lo_; } hilo_; } RC_hl_type_; RC_hl_type_ hl_ = (RC_hl_type_) (p3); (s2hi_) = hl_.hilo_.hi_; (s2lo_) = hl_.hilo_.lo_; } while (0); hi1_ = __builtin_vis_fexpand(s1hi_); lo1_ = __builtin_vis_fexpand(s1lo_); hi2_ = __builtin_vis_fexpand(s2hi_); lo2_ = __builtin_vis_fexpand(s2lo_); his_ = (hi1_) + (hi2_); los_ = (lo1_) + (lo2_); hi_ = __builtin_vis_fpack16(his_); lo_ = __builtin_vis_fpack16(los_); do { typedef union { struct { rc_vec4_type_ hi_, lo_; } hilo_; rc_vec_t v_; } RC_hl_type_; RC_hl_type_ hl_ = (RC_hl_type_) {{(hi_), (lo_)}}; (dstv_) = hl_.v_; } while (0); __asm__("\n;# dep fake GSR %[fakegsr] on %[xdep]" : [fakegsr] "=brm" (rc_gsr_fakedep_) : [xdep] "brm" (dstv_), "0" (rc_gsr_fakedep_)); (v12) = dstv_; } while (0); do { rc_vec_t s1_ = (v12); rc_vec_t dstv_; rc_vec4_type_ hi_, lo_; rc_vec4_type_ s1hi_, s1lo_; rc_vec4_type_ s2hi_, s2lo_; rc_svec_type_ hi1_, hi2_, lo1_, lo2_, his_, los_; do { if (rc_gsr_ldinit_) { extern void rc_mixing_GSR_setting_with_RC_VEC_LDINIT_(void); rc_mixing_GSR_setting_with_RC_VEC_LDINIT_(); } if (!__builtin_constant_p(rc_gsr_align_) || !__builtin_constant_p(2) || !rc_gsr_set_ || (unsigned) (rc_gsr_align_) != rc_gsr_align_ || (unsigned) (2) != rc_gsr_scale_) { rc_gsr_set_ = 1; rc_gsr_align_ = (rc_gsr_align_); rc_gsr_scale_ = (2); unsigned int val_ = (rc_gsr_scale_ << 3) | rc_gsr_align_; if (__builtin_constant_p (val_)) { __asm__("wr %%g0,%[gsrval],%%gsr\n" ";# dep %[depvec] on fake GSR %[fakegsr]" : [depvec] "=brm" (s1_), [fakegsr] "=rm" (rc_gsr_fakedep_) : "0" (s1_), [gsrval] "i" (val_), "1" (rc_gsr_fakedep_)); } else { __asm__("wr %[gsrval],0,%%gsr" "\n;# dep %[depvec] on fake GSR %[fakegsr]" : [depvec] "=brm" (s1_), [fakegsr] "=rm" (rc_gsr_fakedep_) : "0" (s1_), [gsrval] "r" (val_), "1" (rc_gsr_fakedep_)); } } else { __asm__("\n;# dep %[depvec] on fake GSR %[fakegsr]" : [depvec] "=brm" (s1_) : "0" (s1_), [fakegsr] "g" (rc_gsr_fakedep_)); } } while (0); do { typedef union { rc_vec_t v_; struct { rc_vec4_type_ hi_, lo_; } hilo_; } RC_hl_type_; RC_hl_type_ hl_ = (RC_hl_type_) (s1_); (s1hi_) = hl_.hilo_.hi_; (s1lo_) = hl_.hilo_.lo_; } while (0); do { typedef union { rc_vec_t v_; struct { rc_vec4_type_ hi_, lo_; } hilo_; } RC_hl_type_; RC_hl_type_ hl_ = (RC_hl_type_) (p2); (s2hi_) = hl_.hilo_.hi_; (s2lo_) = hl_.hilo_.lo_; } while (0); hi1_ = __builtin_vis_fexpand(s1hi_); lo1_ = __builtin_vis_fexpand(s1lo_); hi2_ = __builtin_vis_fexpand(s2hi_); lo2_ = __builtin_vis_fexpand(s2lo_); his_ = (hi1_) + (hi2_) + (rc_svec_type_){(16), (16), (16), (16)}; los_ = (lo1_) + (lo2_) + (rc_svec_type_){(16), (16), (16), (16)}; hi_ = __builtin_vis_fpack16(his_); lo_ = __builtin_vis_fpack16(los_); do { typedef union { struct { rc_vec4_type_ hi_, lo_; } hilo_; rc_vec_t v_; } RC_hl_type_; RC_hl_type_ hl_ = (RC_hl_type_) {{(hi_), (lo_)}}; (dstv_) = hl_.v_; } while (0); __asm__("\n;# dep fake GSR %[fakegsr] on %[xdep]" : [fakegsr] "=brm" (rc_gsr_fakedep_) : [xdep] "brm" (dstv_), "0" (rc_gsr_fakedep_)); (v22) = dstv_; } while (0); do { rc_vec_t s1_ = (v12); rc_vec_t dstv_; rc_vec4_type_ hi_, lo_; rc_vec4_type_ s1hi_, s1lo_; rc_vec4_type_ s2hi_, s2lo_; rc_svec_type_ hi1_, hi2_, lo1_, lo2_, his_, los_; do { if (rc_gsr_ldinit_) { extern void rc_mixing_GSR_setting_with_RC_VEC_LDINIT_(void); rc_mixing_GSR_setting_with_RC_VEC_LDINIT_(); } if (!__builtin_constant_p(rc_gsr_align_) || !__builtin_constant_p(2) || !rc_gsr_set_ || (unsigned) (rc_gsr_align_) != rc_gsr_align_ || (unsigned) (2) != rc_gsr_scale_) { rc_gsr_set_ = 1; rc_gsr_align_ = (rc_gsr_align_); rc_gsr_scale_ = (2); unsigned int val_ = (rc_gsr_scale_ << 3) | rc_gsr_align_; if (__builtin_constant_p (val_)) { __asm__("wr %%g0,%[gsrval],%%gsr\n" ";# dep %[depvec] on fake GSR %[fakegsr]" : [depvec] "=brm" (s1_), [fakegsr] "=rm" (rc_gsr_fakedep_) : "0" (s1_), [gsrval] "i" (val_), "1" (rc_gsr_fakedep_)); } else { __asm__("wr %[gsrval],0,%%gsr" "\n;# dep %[depvec] on fake GSR %[fakegsr]" : [depvec] "=brm" (s1_), [fakegsr] "=rm" (rc_gsr_fakedep_) : "0" (s1_), [gsrval] "r" (val_), "1" (rc_gsr_fakedep_)); } } else { __asm__("\n;# dep %[depvec] on fake GSR %[fakegsr]" : [depvec] "=brm" (s1_) : "0" (s1_), [fakegsr] "g" (rc_gsr_fakedep_)); } } while (0); do { typedef union { rc_vec_t v_; struct { rc_vec4_type_ hi_, lo_; } hilo_; } RC_hl_type_; RC_hl_type_ hl_ = (RC_hl_type_) (s1_); (s1hi_) = hl_.hilo_.hi_; (s1lo_) = hl_.hilo_.lo_; } while (0); do { typedef union { rc_vec_t v_; struct { rc_vec4_type_ hi_, lo_; } hilo_; } RC_hl_type_; RC_hl_type_ hl_ = (RC_hl_type_) (p2); (s2hi_) = hl_.hilo_.hi_; (s2lo_) = hl_.hilo_.lo_; } while (0); hi1_ = __builtin_vis_fexpand(s1hi_); lo1_ = __builtin_vis_fexpand(s1lo_); hi2_ = __builtin_vis_fexpand(s2hi_); lo2_ = __builtin_vis_fexpand(s2lo_); his_ = (hi1_) + (hi2_); los_ = (lo1_) + (lo2_); hi_ = __builtin_vis_fpack16(his_); lo_ = __builtin_vis_fpack16(los_); do { typedef union { struct { rc_vec4_type_ hi_, lo_; } hilo_; rc_vec_t v_; } RC_hl_type_; RC_hl_type_ hl_ = (RC_hl_type_) {{(hi_), (lo_)}}; (dstv_) = hl_.v_; } while (0); __asm__("\n;# dep fake GSR %[fakegsr] on %[xdep]" : [fakegsr] "=brm" (rc_gsr_fakedep_) : [xdep] "brm" (dstv_), "0" (rc_gsr_fakedep_)); (v12) = dstv_; } while (0); } while (0); do { rc_vec_t u12, u23; do { rc_vec_t shv_; do { rc_vec_t v_ = (v11); do { if (rc_gsr_ldinit_) { extern void rc_mixing_GSR_setting_with_RC_VEC_LDINIT_(void); rc_mixing_GSR_setting_with_RC_VEC_LDINIT_(); } if (!__builtin_constant_p(8 - 1) || !__builtin_constant_p(rc_gsr_scale_) || !rc_gsr_set_ || (unsigned) (8 - 1) != rc_gsr_align_ || (unsigned) (rc_gsr_scale_) != rc_gsr_scale_) { rc_gsr_set_ = 1; rc_gsr_align_ = (8 - 1); rc_gsr_scale_ = (rc_gsr_scale_); unsigned int val_ = (rc_gsr_scale_ << 3) | rc_gsr_align_; if (__builtin_constant_p (val_)) { __asm__("wr %%g0,%[gsrval],%%gsr\n" ";# dep %[depvec] on fake GSR %[fakegsr]" : [depvec] "=brm" (v_), [fakegsr] "=rm" (rc_gsr_fakedep_) : "0" (v_), [gsrval] "i" (val_), "1" (rc_gsr_fakedep_)); } else { __asm__("wr %[gsrval],0,%%gsr" "\n;# dep %[depvec] on fake GSR %[fakegsr]" : [depvec] "=brm" (v_), [fakegsr] "=rm" (rc_gsr_fakedep_) : "0" (v_), [gsrval] "r" (val_), "1" (rc_gsr_fakedep_)); } } else { __asm__("\n;# dep %[depvec] on fake GSR %[fakegsr]" : [depvec] "=brm" (v_) : "0" (v_), [fakegsr] "g" (rc_gsr_fakedep_)); } } while (0); (shv_) = v_; } while (0); do { rc_vec_t dstv_ = __builtin_vis_faligndatav8qi(v13, shv_); __asm__("\n;# dep fake GSR %[fakegsr] on %[xdep]" : [fakegsr] "=brm" (rc_gsr_fakedep_) : [xdep] "brm" (dstv_), "0" (rc_gsr_fakedep_)); (u12) = dstv_; } while (0); } while (0); do { rc_vec_t shv_; do { rc_vec_t v_ = (v22); do { if (rc_gsr_ldinit_) { extern void rc_mixing_GSR_setting_with_RC_VEC_LDINIT_(void); rc_mixing_GSR_setting_with_RC_VEC_LDINIT_(); } if (!__builtin_constant_p(1) || !__builtin_constant_p(rc_gsr_scale_) || !rc_gsr_set_ || (unsigned) (1) != rc_gsr_align_ || (unsigned) (rc_gsr_scale_) != rc_gsr_scale_) { rc_gsr_set_ = 1; rc_gsr_align_ = (1); rc_gsr_scale_ = (rc_gsr_scale_); unsigned int val_ = (rc_gsr_scale_ << 3) | rc_gsr_align_; if (__builtin_constant_p (val_)) { __asm__("wr %%g0,%[gsrval],%%gsr\n" ";# dep %[depvec] on fake GSR %[fakegsr]" : [depvec] "=brm" (v_), [fakegsr] "=rm" (rc_gsr_fakedep_) : "0" (v_), [gsrval] "i" (val_), "1" (rc_gsr_fakedep_)); } else { __asm__("wr %[gsrval],0,%%gsr" "\n;# dep %[depvec] on fake GSR %[fakegsr]" : [depvec] "=brm" (v_), [fakegsr] "=rm" (rc_gsr_fakedep_) : "0" (v_), [gsrval] "r" (val_), "1" (rc_gsr_fakedep_)); } } else { __asm__("\n;# dep %[depvec] on fake GSR %[fakegsr]" : [depvec] "=brm" (v_) : "0" (v_), [fakegsr] "g" (rc_gsr_fakedep_)); } } while (0); (shv_) = v_; } while (0); do { rc_vec_t dstv_ = __builtin_vis_faligndatav8qi(v21, shv_); __asm__("\n;# dep fake GSR %[fakegsr] on %[xdep]" : [fakegsr] "=brm" (rc_gsr_fakedep_) : [xdep] "brm" (dstv_), "0" (rc_gsr_fakedep_)); (u23) = dstv_; } while (0); } while (0); do { rc_vec_t s1_ = (u23); rc_vec_t dstv_; rc_vec4_type_ hi_, lo_; rc_vec4_type_ s1hi_, s1lo_; rc_vec4_type_ s2hi_, s2lo_; rc_svec_type_ hi1_, hi2_, lo1_, lo2_, his_, los_; do { if (rc_gsr_ldinit_) { extern void rc_mixing_GSR_setting_with_RC_VEC_LDINIT_(void); rc_mixing_GSR_setting_with_RC_VEC_LDINIT_(); } if (!__builtin_constant_p(rc_gsr_align_) || !__builtin_constant_p(2) || !rc_gsr_set_ || (unsigned) (rc_gsr_align_) != rc_gsr_align_ || (unsigned) (2) != rc_gsr_scale_) { rc_gsr_set_ = 1; rc_gsr_align_ = (rc_gsr_align_); rc_gsr_scale_ = (2); unsigned int val_ = (rc_gsr_scale_ << 3) | rc_gsr_align_; if (__builtin_constant_p (val_)) { __asm__("wr %%g0,%[gsrval],%%gsr\n" ";# dep %[depvec] on fake GSR %[fakegsr]" : [depvec] "=brm" (s1_), [fakegsr] "=rm" (rc_gsr_fakedep_) : "0" (s1_), [gsrval] "i" (val_), "1" (rc_gsr_fakedep_)); } else { __asm__("wr %[gsrval],0,%%gsr" "\n;# dep %[depvec] on fake GSR %[fakegsr]" : [depvec] "=brm" (s1_), [fakegsr] "=rm" (rc_gsr_fakedep_) : "0" (s1_), [gsrval] "r" (val_), "1" (rc_gsr_fakedep_)); } } else { __asm__("\n;# dep %[depvec] on fake GSR %[fakegsr]" : [depvec] "=brm" (s1_) : "0" (s1_), [fakegsr] "g" (rc_gsr_fakedep_)); } } while (0); do { typedef union { rc_vec_t v_; struct { rc_vec4_type_ hi_, lo_; } hilo_; } RC_hl_type_; RC_hl_type_ hl_ = (RC_hl_type_) (s1_); (s1hi_) = hl_.hilo_.hi_; (s1lo_) = hl_.hilo_.lo_; } while (0); do { typedef union { rc_vec_t v_; struct { rc_vec4_type_ hi_, lo_; } hilo_; } RC_hl_type_; RC_hl_type_ hl_ = (RC_hl_type_) (u12); (s2hi_) = hl_.hilo_.hi_; (s2lo_) = hl_.hilo_.lo_; } while (0); hi1_ = __builtin_vis_fexpand(s1hi_); lo1_ = __builtin_vis_fexpand(s1lo_); hi2_ = __builtin_vis_fexpand(s2hi_); lo2_ = __builtin_vis_fexpand(s2lo_); his_ = ((hi1_) - (hi2_) + (rc_svec_type_){(256*16), (256*16), (256*16), (256*16)}); los_ = ((lo1_) - (lo2_) + (rc_svec_type_){(256*16), (256*16), (256*16), (256*16)}); hi_ = __builtin_vis_fpack16(his_); lo_ = __builtin_vis_fpack16(los_); do { typedef union { struct { rc_vec4_type_ hi_, lo_; } hilo_; rc_vec_t v_; } RC_hl_type_; RC_hl_type_ hl_ = (RC_hl_type_) {{(hi_), (lo_)}}; (dstv_) = hl_.v_; } while (0); __asm__("\n;# dep fake GSR %[fakegsr] on %[xdep]" : [fakegsr] "=brm" (rc_gsr_fakedep_) : [xdep] "brm" (dstv_), "0" (rc_gsr_fakedep_)); (sum) = dstv_; } while (0); } while (0); (*(rc_vec_t*)(&(dst)[j]) = (sum)); (i1) += 8; (i2) += 8; (i3) += 8; (j) += 8; } while (0); } if (rem > 0) { do { rc_vec_t p1, p2, p3, sum; ((p1) = *(const rc_vec_t*)(&(src)[i1])); ((p2) = *(const rc_vec_t*)(&(src)[i2])); ((p3) = *(const rc_vec_t*)(&(src)[i3])); do { do { rc_vec_t s1_ = (p1); rc_vec_t dstv_; rc_vec4_type_ hi_, lo_; rc_vec4_type_ s1hi_, s1lo_; rc_vec4_type_ s2hi_, s2lo_; rc_svec_type_ hi1_, hi2_, lo1_, lo2_, his_, los_; do { if (rc_gsr_ldinit_) { extern void rc_mixing_GSR_setting_with_RC_VEC_LDINIT_(void); rc_mixing_GSR_setting_with_RC_VEC_LDINIT_(); } if (!__builtin_constant_p(rc_gsr_align_) || !__builtin_constant_p(2) || !rc_gsr_set_ || (unsigned) (rc_gsr_align_) != rc_gsr_align_ || (unsigned) (2) != rc_gsr_scale_) { rc_gsr_set_ = 1; rc_gsr_align_ = (rc_gsr_align_); rc_gsr_scale_ = (2); unsigned int val_ = (rc_gsr_scale_ << 3) | rc_gsr_align_; if (__builtin_constant_p (val_)) { __asm__("wr %%g0,%[gsrval],%%gsr\n" ";# dep %[depvec] on fake GSR %[fakegsr]" : [depvec] "=brm" (s1_), [fakegsr] "=rm" (rc_gsr_fakedep_) : "0" (s1_), [gsrval] "i" (val_), "1" (rc_gsr_fakedep_)); } else { __asm__("wr %[gsrval],0,%%gsr" "\n;# dep %[depvec] on fake GSR %[fakegsr]" : [depvec] "=brm" (s1_), [fakegsr] "=rm" (rc_gsr_fakedep_) : "0" (s1_), [gsrval] "r" (val_), "1" (rc_gsr_fakedep_)); } } else { __asm__("\n;# dep %[depvec] on fake GSR %[fakegsr]" : [depvec] "=brm" (s1_) : "0" (s1_), [fakegsr] "g" (rc_gsr_fakedep_)); } } while (0); do { typedef union { rc_vec_t v_; struct { rc_vec4_type_ hi_, lo_; } hilo_; } RC_hl_type_; RC_hl_type_ hl_ = (RC_hl_type_) (s1_); (s1hi_) = hl_.hilo_.hi_; (s1lo_) = hl_.hilo_.lo_; } while (0); do { typedef union { rc_vec_t v_; struct { rc_vec4_type_ hi_, lo_; } hilo_; } RC_hl_type_; RC_hl_type_ hl_ = (RC_hl_type_) (p3); (s2hi_) = hl_.hilo_.hi_; (s2lo_) = hl_.hilo_.lo_; } while (0); hi1_ = __builtin_vis_fexpand(s1hi_); lo1_ = __builtin_vis_fexpand(s1lo_); hi2_ = __builtin_vis_fexpand(s2hi_); lo2_ = __builtin_vis_fexpand(s2lo_); his_ = (hi1_) + (hi2_); los_ = (lo1_) + (lo2_); hi_ = __builtin_vis_fpack16(his_); lo_ = __builtin_vis_fpack16(los_); do { typedef union { struct { rc_vec4_type_ hi_, lo_; } hilo_; rc_vec_t v_; } RC_hl_type_; RC_hl_type_ hl_ = (RC_hl_type_) {{(hi_), (lo_)}}; (dstv_) = hl_.v_; } while (0); __asm__("\n;# dep fake GSR %[fakegsr] on %[xdep]" : [fakegsr] "=brm" (rc_gsr_fakedep_) : [xdep] "brm" (dstv_), "0" (rc_gsr_fakedep_)); (v13) = dstv_; } while (0); do { rc_vec_t s1_ = (v13); rc_vec_ local
[all...]
/haiku-buildtools/gcc/gcc/config/rs6000/
H A Dppc-asm.h153 #define v13 13 macro
/haiku-buildtools/gcc/gcc/testsuite/g++.dg/eh/
H A Dpr29166.C19 register int v11=OFF+11,v12=OFF+12,v13=OFF+13,v14=OFF+14,v15=OFF+15,v16=OFF+16,v17=OFF+17,v18=OFF+18,v19=OFF+19,v20=OFF+20; local
50 sum +=v11+v12+v13+v14+v15+v16+v17+v18+v19+v20;
93 register int v11=OFF+11,v12=OFF+12,v13=OFF+13,v14=OFF+14,v15=OFF+15,v16=OFF+16,v17=OFF+17,v18=OFF+18,v19=OFF+19,v20=OFF+20; local
127 sum +=v11+v12+v13+v14+v15+v16+v17+v18+v19+v20;
164 sum +=v11+v12+v13+v14+v15+v16+v17+v18+v19+v20;
/haiku-buildtools/gcc/gmp/mpn/powerpc64/vmx/
H A Dpopcount.asm61 define(`cnt4',`v13')
/haiku-buildtools/gcc/gmp/mpn/powerpc32/vmx/
H A Dmod_34lsub1.asm52 define(`x3', `v13')

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