Searched refs:set_reg (Results 1 - 4 of 4) sorted by relevance
/haiku-buildtools/gcc/libgcc/config/ia64/ |
H A D | unwind-ia64.c | 465 set_reg (struct unw_reg_info *reg, enum unw_where where, 610 set_reg (sr->curr.reg + save_order[i], UNW_WHERE_GR, 642 set_reg (sr->curr.reg + UNW_REG_B1 + i, UNW_WHERE_GR, 657 set_reg (sr->curr.reg + UNW_REG_B1 + i, UNW_WHERE_SPILL_HOME, 675 set_reg (sr->curr.reg + UNW_REG_R4 + i, UNW_WHERE_SPILL_HOME, 686 set_reg (sr->curr.reg + base + i, UNW_WHERE_SPILL_HOME, 703 set_reg (sr->curr.reg + UNW_REG_F2 + i, UNW_WHERE_SPILL_HOME, 720 set_reg (sr->curr.reg + UNW_REG_R4 + i, UNW_WHERE_GR, 735 set_reg (sr->curr.reg + UNW_REG_R4 + i, UNW_WHERE_SPILL_HOME, 746 set_reg (s 463 set_reg (struct unw_reg_info *reg, enum unw_where where, function [all...] |
/haiku-buildtools/gcc/gcc/ |
H A D | web.c | 102 void set_reg (rtx r) { reg_pvt = r; } function 298 root->set_reg (newreg);
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/haiku-buildtools/gcc/gcc/config/iq2000/ |
H A D | iq2000.c | 407 rtx set_reg; 431 || (set_reg = operands[0]) == 0) 442 set_reg = operands[0]; 443 if (set_reg == 0) 446 while (GET_CODE (set_reg) == SUBREG) 447 set_reg = SUBREG_REG (set_reg); 449 mode = GET_MODE (set_reg); 451 iq2000_load_reg = set_reg; 454 iq2000_load_reg2 = gen_rtx_REG (SImode, REGNO (set_reg) 403 rtx set_reg; local [all...] |
/haiku-buildtools/legacy/gcc/gcc/config/mips/ |
H A D | mips.c | 1438 register rtx set_reg; 1465 || (set_reg = operands[0]) == 0) 1475 set_reg = operands[0]; 1476 if (set_reg == 0) 1479 while (GET_CODE (set_reg) == SUBREG) 1480 set_reg = SUBREG_REG (set_reg); 1482 mode = GET_MODE (set_reg); 1484 mips_load_reg = set_reg; 1486 > (FP_REG_P (REGNO (set_reg)) 1435 register rtx set_reg; local [all...] |
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