/haiku-buildtools/binutils/gas/testsuite/gas/i386/ |
H A D | x86-64-specific-reg.s | 5 .irp reg1, ax, cx, dx, bx, sp, bp, si, di 6 lodsb %ds:(%r\reg1) 8 stosb %es:(%r\reg1) 10 scasb %es:(%r\reg1) 12 insb %dx, %es:(%r\reg1) 14 outsb %ds:(%r\reg1), %dx 16 xlatb %ds:(%r\reg1) 18 movsb %ds:(%r\reg1), %es:(%rdi) 19 movsb %ds:(%rsi), %es:(%r\reg1) 21 cmpsb %es:(%r\reg1), [all...] |
/haiku-buildtools/gcc/gcc/testsuite/gcc.c-torture/execute/ |
H A D | 930930-1.c | 8 f (mr_TR, mr_SPB, mr_HB, reg1, reg2) 12 ptr_t *reg1; 19 if (reg1 < reg2) 21 if ((ptr_t *) *reg1 < mr_HB && (ptr_t *) *reg1 >= mr_SPB) 22 *--mr_TR = *reg1; 23 reg1--;
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/haiku-buildtools/binutils/gas/testsuite/gas/arm/ |
H A D | armv8-2-fp16-simd.s | 1 .macro f16_dq_ifsu reg0 reg1 reg2 3 \op d\reg0, d\reg1, d\reg2 4 \op q\reg0, q\reg1, q\reg2 8 .macro f16_q_ifsu reg0 reg1 reg2 10 \op q\reg0, q\reg1, q\reg2 14 .macro f16_dq_abs_neg reg0 reg1 16 \op d\reg0, d\reg1 17 \op q\reg0, q\reg1 21 .macro f16_q_abs_neg reg0 reg1 23 \op q\reg0, q\reg1 [all...] |
H A D | armv8-2-fp16-scalar.s | 1 .macro f16_sss_arithmetic reg0, reg1, reg2 3 \op s\reg0, s\reg1, s\reg2 7 .macro f16_ss_arithmetic reg0, reg1 9 \op s\reg0, s\reg1 19 .macro f16_ss_cmp reg0, reg1 21 \op s\reg0, s\reg1 25 .macro f16_sss_vsel reg0, reg1, reg2 27 \op s\reg0, s\reg1, s\reg2 31 .macro f16_ss_cvt reg0, reg1 33 \op s\reg0, s\reg1 [all...] |
H A D | armv8-2-fp16-scalar-bad.s | 1 .macro f16_sss_arithmetic reg0, reg1, reg2 4 \op\cond s\reg0, s\reg1, s\reg2 9 .macro f16_ss_arithmetic reg0, reg1 12 \op\cond s\reg0, s\reg1 25 .macro f16_ss_cmp reg0, reg1 28 \op\cond s\reg0, s\reg1 33 .macro f16_ss_cvt reg0, reg1 36 vcvt\cond\mode s\reg0, s\reg1 41 .macro f16_ssi_cvt_imm32 reg0, reg1, imm 44 vcvt\cond\mode s\reg0, s\reg1, \im [all...] |
H A D | simd_by_scalar_low_regbank.s | 1 .macro vmul_iter reg0 reg1 reg2 idx 3 \op d\reg0, d\reg1, d\reg2[\idx] 4 \op q\reg0, q\reg1, d\reg2[\idx] 8 .macro vmul_acc_iter reg0 reg1 reg2 idx 10 \op d\reg0, d\reg1, d\reg2[\idx] 11 \op q\reg0, q\reg1, d\reg2[\idx]
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/haiku-buildtools/gcc/gcc/testsuite/gcc.target/i386/ |
H A D | pr22362.c | 7 register unsigned int reg1 __asm__ ("edi");
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/haiku-buildtools/binutils/gas/config/ |
H A D | tc-microblaze.c | 900 unsigned reg1; local 945 op_end = parse_reg (op_end + 1, ®1); /* Get rd. */ 949 reg1 = 0; 967 if (check_spl_reg (& reg1)) 977 inst |= (reg1 << RD_LOW) & RD_MASK; 983 inst |= (reg1 << RD_LOW) & RD_MASK; 992 op_end = parse_reg (op_end + 1, ®1); /* Get rd. */ 996 reg1 = 0; 1011 if (check_spl_reg (& reg1)) 1059 count = 32 - reg1; [all...] |
H A D | tc-m68hc11.c | 147 register_id reg1; member in struct:operand 1156 oper->reg1 = REG_NONE; 1235 oper->reg1 = reg; 1267 oper->reg1 = reg; 1417 oper->reg1 = reg; 1423 oper->reg1 = reg; 1840 gas_assert (operands[0].reg1 == REG_NONE && operands[0].reg2 == REG_NONE); 1981 gas_assert (operands[0].reg1 != REG_NONE); 1989 code = operands[0].reg1; 1991 if (operands[0].reg1 [all...] |
/haiku-buildtools/legacy/binutils/gas/ |
H A D | dw2gencfi.c | 64 unsigned reg1; member in struct:cfi_insn_data::__anon2617::__anon2619 216 cfi_add_CFA_insn_reg_reg (int insn, unsigned reg1, unsigned reg2) 221 insn_ptr->u.rr.reg1 = reg1; 276 cfi_add_CFA_register (unsigned reg1, unsigned reg2) 278 cfi_add_CFA_insn_reg_reg (DW_CFA_register, reg1, reg2); 451 unsigned reg1, reg2; 468 reg1 = cfi_parse_reg (); 471 cfi_add_CFA_offset (reg1, offset); 475 reg1 215 cfi_add_CFA_insn_reg_reg(int insn, unsigned reg1, unsigned reg2) argument 275 cfi_add_CFA_register(unsigned reg1, unsigned reg2) argument 449 unsigned reg1, reg2; local [all...] |
/haiku-buildtools/legacy/gcc/gcc/config/m68k/ |
H A D | 3b1.h | 214 { register rtx reg1, reg2, breg, ireg; \ 229 reg1 = 0; reg2 = 0; \ 245 reg1 = XEXP (addr, 0); \ 250 reg1 = XEXP (addr, 1); \ 255 reg1 = XEXP (addr, 0); \ 260 reg1 = XEXP (addr, 1); \ 265 reg1 = XEXP (addr, 0); \ 270 reg1 = XEXP (addr, 1); \ 275 { if (reg1 == 0) reg1 [all...] |
H A D | hp320.h | 416 { register rtx reg1, reg2, breg, ireg; \ 431 reg1 = 0; reg2 = 0; \ 447 reg1 = XEXP (addr, 0); \ 452 reg1 = XEXP (addr, 1); \ 457 reg1 = XEXP (addr, 0); \ 462 reg1 = XEXP (addr, 1); \ 467 reg1 = XEXP (addr, 0); \ 472 reg1 = XEXP (addr, 1); \ 477 { if (reg1 == 0) reg1 [all...] |
H A D | news.h | 421 { register rtx reg1, reg2, breg, ireg; \ 436 reg1 = 0; reg2 = 0; \ 452 reg1 = XEXP (addr, 0); \ 457 reg1 = XEXP (addr, 1); \ 462 reg1 = XEXP (addr, 0); \ 467 reg1 = XEXP (addr, 1); \ 472 reg1 = XEXP (addr, 0); \ 477 reg1 = XEXP (addr, 1); \ 482 { if (reg1 == 0) reg1 [all...] |
H A D | crds.h | 325 { register rtx reg1, reg2, breg, ireg; \ 340 reg1 = 0; reg2 = 0; \ 356 reg1 = XEXP (addr, 0); \ 361 reg1 = XEXP (addr, 1); \ 366 reg1 = XEXP (addr, 0); \ 371 reg1 = XEXP (addr, 1); \ 376 reg1 = XEXP (addr, 0); \ 381 reg1 = XEXP (addr, 1); \ 386 { if (reg1 == 0) reg1 [all...] |
H A D | tower-as.h | 394 { register rtx reg1, reg2, breg, ireg; \ 409 reg1 = 0; reg2 = 0; \ 425 reg1 = XEXP (addr, 0); \ 430 reg1 = XEXP (addr, 1); \ 435 reg1 = XEXP (addr, 0); \ 440 reg1 = XEXP (addr, 1); \ 445 reg1 = XEXP (addr, 0); \ 450 reg1 = XEXP (addr, 1); \ 455 { if (reg1 == 0) reg1 [all...] |
/haiku-buildtools/gcc/gcc/ |
H A D | auto-inc-dec.c | 152 the forms are reg1 + reg2. */ 288 for the reg1-reg2 case. Note that we do not have a INC_POS_REG 317 /* Parsed fields of an inc insn of the form "reg_res = reg0+reg1" or 324 bool reg1_is_const; /* True if reg1 is const, false if reg1 is a reg. */ 328 rtx reg1; member in struct:inc_insn 329 enum inc_state reg1_state;/* The form of the const if reg1 is a const. */ 330 HOST_WIDE_INT reg1_val;/* Value if reg1 is const. */ 357 REGNO (inc_insn.reg0), REGNO (inc_insn.reg1)); 369 REGNO (inc_insn.reg_res), REGNO (inc_insn.reg1)); 388 rtx reg1; /* This is either a reg or a const depending on member in struct:mem_insn 1305 rtx reg1 = XEXP (XEXP (x, 0), 1); local [all...] |
/haiku-buildtools/legacy/gcc/gcc/config/tahoe/ |
H A D | tahoe.c | 75 register rtx reg1, reg2, breg, ireg; local 100 reg1 = 0; reg2 = 0; 128 reg1 = XEXP (addr, 0); 133 reg1 = XEXP (addr, 1); 138 reg1 = XEXP (addr, 0); 143 reg1 = XEXP (addr, 1); 148 if (reg1 == 0) 149 reg1 = addr; 159 if (reg1 != 0 && GET_CODE (reg1) [all...] |
/haiku-buildtools/legacy/gcc/gcc/config/vax/ |
H A D | vax.c | 75 register rtx reg1, reg2, breg, ireg; 108 reg1 = 0; ireg = 0; breg = 0; offset = 0; 134 reg1 = XEXP (addr, 1); 139 reg1 = XEXP (addr, 0); 147 if (reg1) 150 reg1 = addr; 172 if (reg1) 173 ireg = reg1, breg = XEXP (addr, 0), reg1 = 0; 175 reg1 74 register rtx reg1, reg2, breg, ireg; local [all...] |
/haiku-buildtools/legacy/gcc/gcc/config/pyr/ |
H A D | pyr.h | 1403 register rtx reg1, reg2, breg, ireg; \ 1417 reg1 = 0; reg2 = 0; \ 1435 reg1 = XEXP (addr, 0); \ 1440 reg1 = XEXP (addr, 1); \ 1445 reg1 = XEXP (addr, 0); \ 1450 reg1 = XEXP (addr, 1); \ 1455 if (reg1 == 0) \ 1456 reg1 = addr; \ 1468 if (reg1 != 0 && GET_CODE (reg1) [all...] |
/haiku-buildtools/legacy/gcc/gcc/config/fx80/ |
H A D | fx80.h | 1295 { register rtx reg1, reg2, breg, ireg; \ 1311 reg1 = 0; reg2 = 0; \ 1327 reg1 = XEXP (addr, 0); \ 1332 reg1 = XEXP (addr, 1); \ 1337 reg1 = XEXP (addr, 0); \ 1342 reg1 = XEXP (addr, 1); \ 1347 reg1 = XEXP (addr, 0); \ 1352 reg1 = XEXP (addr, 1); \ 1357 { if (reg1 == 0) reg1 [all...] |
/haiku-buildtools/legacy/gcc/gcc/config/elxsi/ |
H A D | elxsi.c | 89 register rtx reg1, reg2, breg, ireg; local 107 reg1 = 0; reg2 = 0;
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/haiku-buildtools/binutils/gas/ |
H A D | dw2gencfi.c | 544 cfi_add_CFA_insn_reg_reg (int insn, unsigned reg1, unsigned reg2) 549 insn_ptr->u.rr.reg1 = reg1; 634 cfi_add_CFA_register (unsigned reg1, unsigned reg2) 636 cfi_add_CFA_insn_reg_reg (DW_CFA_register, reg1, reg2); 827 unsigned reg1, reg2; 845 reg1 = cfi_parse_reg (); 848 cfi_add_CFA_offset (reg1, offset); 852 reg1 = cfi_parse_reg (); 855 cfi_add_CFA_val_offset (reg1, offse 541 cfi_add_CFA_insn_reg_reg(int insn, unsigned reg1, unsigned reg2) argument 631 cfi_add_CFA_register(unsigned reg1, unsigned reg2) argument 823 unsigned reg1, reg2; local [all...] |
/haiku-buildtools/gcc/gcc/testsuite/gcc.c-torture/compile/ |
H A D | gen_tst.c | 16 #define reg1 r1 macro 31 char *a1[] = {"reg1", "indreg1", "imm1", "limm1",
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H A D | HIset.c | 12 #define reg1 r1 macro 27 {reg0 = reg1; } 59 {indreg0 = reg1; } 91 {adr0 = reg1; } 123 {adrreg0 = reg1; } 155 {adrx0 = reg1; } 187 {regx0 = reg1; }
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H A D | QIset.c | 12 #define reg1 r1 macro 27 {reg0 = reg1; } 59 {indreg0 = reg1; } 91 {adr0 = reg1; } 123 {adrreg0 = reg1; } 155 {adrx0 = reg1; } 187 {regx0 = reg1; }
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