Searched refs:XS (Results 1 - 5 of 5) sorted by relevance

/haiku-buildtools/binutils/opcodes/
H A Di386-dis.c405 #define XS { OP_XS, v_mode } macro
3992 { "psrldq", { XS, Ib }, 0 },
3999 { "pslldq", { XS, Ib }, 0 },
4006 {"extrq", { XS, Ib, Ib }, 0 },
4007 {"insertq", { XM, XS, Ib, Ib }, 0 },
4014 {"extrq", { XM, XS }, 0 },
4015 {"insertq", { XM, XS }, 0 },
4165 { "movdq2q",{ MX, XS }, 0 },
4195 { "maskmovdqu", { XM, XS }, PREFIX_OPCODE },
10316 { "vmovmskpX", { Gdq, XS },
[all...]
H A Di386-dis-evex.h1375 { "vpextrw", { Gdq, XS, Ib }, 0 },
H A Dppc-opc.c579 /* The RS field in a D, DS, X, XFX, XS, M, MD or MDS form
919 /* The XT and XS fields in an XX1 or XX3 form instruction. This is split. */
924 /* The XT and XS fields in an DQ form VSX instruction. This is split. */
2190 /* The XT and XS fields in an XX1 or XX3 form instruction. This is split. */
2209 /* The XT and XS fields in an DQ form VSX instruction. This is split. */
2961 /* An XS form instruction. */
2962 #define XS(op, xop, rc) (OP (op) | ((((unsigned long)(xop)) & 0x1ff) << 2) | (((unsigned long)(rc)) & 1))
2963 #define XS_MASK XS (0x3f, 0x1ff, 1)
6209 {"sradi", XS(31,413,0), XS_MASK, PPC64, 0, {RA, RS, SH6}},
6210 {"sradi.", XS(3
2959 #define XS macro
[all...]
/haiku-buildtools/legacy/binutils/opcodes/
H A Di386-dis.c313 #define XS OP_XS, v_mode macro
901 { "movmskpX", Gdq, XS, XX },
1677 { "movdq2q", MX, XS, XX },
H A Dppc-opc.c417 /* The RS field in a D, DS, X, XFX, XS, M, MD or MDS form
1735 /* An XS form instruction. */
1736 #define XS(op, xop, rc) (OP (op) | ((((unsigned long)(xop)) & 0x1ff) << 2) | (((unsigned long)(rc)) & 1))
1737 #define XS_MASK XS (0x3f, 0x1ff, 1)
3943 { "sradi", XS(31,413,0), XS_MASK, PPC64, { RA, RS, SH6 } },
3944 { "sradi.", XS(31,413,1), XS_MASK, PPC64, { RA, RS, SH6 } },
1733 #define XS macro

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