/haiku-buildtools/legacy/binutils/include/opcode/ |
H A D | tic30.h | 190 #define Rn 0x0001 macro 209 #define GAddr1 Rn | Direct | Indirect | Imm16 211 #define TAddr1 op3T1 | Rn | Indirect 212 #define TAddr2 op3T2 | Rn | Indirect 213 #define Reg Rn | ARn 247 { "absf" ,2,0x00000000,AddressMode, { GAddr1, Rn, 0 }, Imm_Float }, 251 { "addf" ,2,0x01800000,AddressMode, { GAddr1, Rn, 0 }, Imm_Float }, 252 { "addf3" ,3,0x20800000,AddressMode, { TAddr1, TAddr2, Rn }, Imm_None }, 347 { "cmpf" ,2,0x04000000,AddressMode, { GAddr1, Rn, 0 }, Imm_Float }, 408 { "float" ,2,0x05800000,AddressMode, { GAddr2, Rn, [all...] |
/haiku-buildtools/binutils/include/opcode/ |
H A D | tic30.h | 190 #define Rn 0x0001 macro 209 #define GAddr1 Rn | Direct | Indirect | Imm16 211 #define TAddr1 op3T1 | Rn | Indirect 212 #define TAddr2 op3T2 | Rn | Indirect 213 #define Reg Rn | ARn 247 { "absf" ,2,0x00000000,AddressMode, { GAddr1, Rn, 0 }, Imm_Float }, 251 { "addf" ,2,0x01800000,AddressMode, { GAddr1, Rn, 0 }, Imm_Float }, 252 { "addf3" ,3,0x20800000,AddressMode, { TAddr1, TAddr2, Rn }, Imm_None }, 347 { "cmpf" ,2,0x04000000,AddressMode, { GAddr1, Rn, 0 }, Imm_Float }, 408 { "float" ,2,0x05800000,AddressMode, { GAddr2, Rn, [all...] |
/haiku-buildtools/binutils/gas/testsuite/gas/arm/ |
H A D | arm3-bad.l | 2 .*arm3-bad.s:4: Error: Rn must not overlap other operands -- `swp r0,r1,\[r0\]' 3 .*arm3-bad.s:5: Error: Rn must not overlap other operands -- `swp r1,r0,\[r0\]'
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H A D | archv6t2-bad.s | 49 @ ldsttv4 Rd == Rn (warning)
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H A D | sp-pc-usage-t.s | 28 @ R13 as a base register <Rn> of any load/store instruction. 43 @ R13 as the first operand <Rn> in any add{s}, cmn, cmp, or sub{s} instruction.
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H A D | sp-pc-validations-bad-t.s | 53 @ LDRB<c><q> <Rt>, [<Rn>, #+<imm>] => See LDRBT 136 @ LDRH<c><q> <Rt>, [<Rn>, #+<imm>] => See LDRHT
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/haiku-buildtools/legacy/binutils/gas/testsuite/gas/arm/ |
H A D | arm3-bad.l | 2 .*arm3-bad.s:4: Error: Rn must not overlap other operands -- `swp r0,r1,\[r0\]' 3 .*arm3-bad.s:5: Error: Rn must not overlap other operands -- `swp r1,r0,\[r0\]'
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H A D | archv6t2-bad.s | 49 @ ldsttv4 Rd == Rn (warning)
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/haiku-buildtools/binutils/gas/testsuite/gas/aarch64/ |
H A D | addsub.s | 55 .macro do_addsub_ext type, op, Rn, reg, extend, amount 59 \op \reg\()16, \Rn, \reg\()1 62 adjust_rm \op, \reg\()16, \Rn, \reg, 1, \extend 64 adjust_rm \op, \reg\()16, \Rn, \reg, 1, \extend, \amount 71 \op \reg\()ZR, \Rn, \reg\()1 74 adjust_rm \op, \reg\()ZR, \Rn, \reg, 1, \extend 76 adjust_rm \op, \reg\()ZR, \Rn, \reg, 1, \extend, \amount 82 \op \Rn, \reg\()1 85 \op \Rn, \reg\()1, \extend 87 \op \Rn, \re [all...] |
/haiku-buildtools/binutils/opcodes/ |
H A D | aarch64-tbl.h | 2080 CORE_INSN ("adc", 0x1a000000, 0x7fe0fc00, addsub_carry, 0, OP3 (Rd, Rn, Rm), QL_I3SAMER, F_SF), 2081 CORE_INSN ("adcs", 0x3a000000, 0x7fe0fc00, addsub_carry, 0, OP3 (Rd, Rn, Rm), QL_I3SAMER, F_SF), 2082 CORE_INSN ("sbc", 0x5a000000, 0x7fe0fc00, addsub_carry, 0, OP3 (Rd, Rn, Rm), QL_I3SAMER, F_HAS_ALIAS | F_SF), 2084 CORE_INSN ("sbcs", 0x7a000000, 0x7fe0fc00, addsub_carry, 0, OP3 (Rd, Rn, Rm), QL_I3SAMER, F_HAS_ALIAS | F_SF), 2102 CORE_INSN ("add", 0x0b000000, 0x7f200000, addsub_shift, 0, OP3 (Rd, Rn, Rm_SFT), QL_I3SAMER, F_SF), 2103 CORE_INSN ("adds", 0x2b000000, 0x7f200000, addsub_shift, 0, OP3 (Rd, Rn, Rm_SFT), QL_I3SAMER, F_HAS_ALIAS | F_SF), 2104 CORE_INSN ("cmn", 0x2b00001f, 0x7f20001f, addsub_shift, 0, OP2 (Rn, Rm_SFT), QL_I2SAME, F_ALIAS | F_SF), 2105 CORE_INSN ("sub", 0x4b000000, 0x7f200000, addsub_shift, 0, OP3 (Rd, Rn, Rm_SFT), QL_I3SAMER, F_HAS_ALIAS | F_SF), 2107 CORE_INSN ("subs", 0x6b000000, 0x7f200000, addsub_shift, 0, OP3 (Rd, Rn, Rm_SFT), QL_I3SAMER, F_HAS_ALIAS | F_SF), 2108 CORE_INSN ("cmp", 0x6b00001f, 0x7f20001f, addsub_shift, 0, OP2 (Rn, Rm_SF [all...] |
H A D | arm-dis.c | 5672 unsigned int Rn = (given & 0x000f0000) >> 16; 5680 func (stream, "[%s", arm_regnames[Rn]); 5684 if (Rn != 15) 5687 else if (Rn == 15) /* 12-bit negative immediate offset. */ 5744 if (Rn == 15) 5757 unsigned int Rn = (given & 0x000f0000) >> 16; 5760 func (stream, "[%s", arm_regnames[Rn]); 5671 unsigned int Rn = (given & 0x000f0000) >> 16; local 5756 unsigned int Rn = (given & 0x000f0000) >> 16; local
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/haiku-buildtools/binutils/gas/config/ |
H A D | tc-arm.c | 2081 first_error (_("don't use Rn-Rm syntax with non-unit stride")); 5460 [Rn, #offset] .reg=Rn .reloc.exp=offset 5461 [Rn, +/-Rm] .reg=Rn .imm=Rm .immisreg=1 .negative=0/1 5462 [Rn, +/-Rm, shift] .reg=Rn .imm=Rm .immisreg=1 .negative=0/1 5469 [Rn], #offset .reg=Rn .reloc.exp=offset 5470 [Rn], 8293 unsigned Rn = inst.operands[2].reg; local 8714 unsigned Rd, Rn; local 8765 unsigned Rd, Rn, Rm; local 10493 int Rd, Rn; local 10515 int Rd, Rs, Rn; local 10774 int Rd, Rs, Rn; local 10862 int Rd, Rs, Rn; local 10974 int Rd, Rn; local 11004 unsigned Rd, Rn; local 11281 unsigned Rd, Rn, Rm; local 11579 int Rn; local 11795 unsigned Rd, Rn, Rm, Ra; local 11816 unsigned RdLo, RdHi, Rn, Rm; local 11837 unsigned Rn, Rm; local 12168 unsigned Rn, Rm; local 12297 unsigned Rn; local 12344 unsigned Rd, Rn, Rm; local 12406 unsigned RdLo, RdHi, Rn, Rm; local 12504 unsigned Rd, Rn; local 12538 unsigned Rd, Rn, Rm; local 12898 unsigned Rd, Rn, Rm; local 12916 unsigned Rd, Rn, Rm; local 12960 unsigned Rd, Rn; local 13004 unsigned Rd, Rn; local 13054 unsigned Rd, Rn, Rm; local 13126 unsigned Rn, Rm; local 13179 unsigned Rd, Rn; local 17496 unsigned int Rn = inst.operands[1].reg; local [all...] |
H A D | tc-tic30.c | 588 current_op->op_type = Rn; 903 if ((p_insn.operand_type[count][i]->op_type & Rn) && i < 2) 911 if ((p_insn.tm->operand_types[0][0] & (Indirect | Rn)) 912 == (Indirect | Rn)) 946 p_insn.p_field = 0x00000000; /* Ind * Ind, Rn +/- Rn. */ 948 p_insn.p_field = 0x01000000; /* Ind * Rn, Ind +/- Rn. */ 950 p_insn.p_field = 0x03000000; /* Ind * Rn, Rn [all...] |
/haiku-buildtools/legacy/binutils/gas/config/ |
H A D | tc-tic30.c | 579 current_op->op_type = Rn; 900 if ((p_insn.operand_type[count][i]->op_type & Rn) && i < 2) 908 if ((p_insn.tm->operand_types[0][0] & (Indirect | Rn)) 909 == (Indirect | Rn)) 943 p_insn.p_field = 0x00000000; /* Ind * Ind, Rn +/- Rn. */ 945 p_insn.p_field = 0x01000000; /* Ind * Rn, Ind +/- Rn. */ 947 p_insn.p_field = 0x03000000; /* Ind * Rn, Rn [all...] |
H A D | tc-arm.c | 3328 [Rn, #offset] .reg=Rn .reloc.exp=offset 3329 [Rn, +/-Rm] .reg=Rn .imm=Rm .immisreg=1 .negative=0/1 3330 [Rn, +/-Rm, shift] .reg=Rn .imm=Rm .immisreg=1 .negative=0/1 3337 [Rn], #offset .reg=Rn .reloc.exp=offset 3338 [Rn], +/-Rm .reg=Rn 4572 unsigned Rn = inst.operands[2].reg; local 6166 int Rd, Rn; local 6182 int Rd, Rs, Rn; local 6381 int Rd, Rs, Rn; local 6464 int Rd, Rs, Rn; local 7000 int Rn; local [all...] |