/haiku-buildtools/legacy/binutils/gas/ |
H A D | itbl-parse.h | 37 INSN = 263, enumerator in enum:yytokentype 50 #define INSN 263 macro
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H A D | itbl-parse.y | 289 %token DREG CREG GREG IMMED ADDR INSN NUM ID NL PNUM 314 | pnum INSN name value range flags 316 DBG (("line %d: entry pnum=%d type=INSN name=%s value=x%x",
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H A D | itbl-lex.l | 62 "insn"|"INSN" { 63 return INSN;
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/haiku-buildtools/legacy/gcc/gcc/ |
H A D | rtl.h | 134 1 in an INSN, CALL_INSN, JUMP_INSN, CODE_LABEL or BARRIER 151 1 in an INSN, JUMP_INSN, or CALL_INSN if this insn must be scheduled 153 1 in an INSN, JUMP_INSN, or CALL_INSN if insn is in a delay slot and 168 /* 1 in an INSN or a SET if this rtx is related to the call frame, 246 #define INSN_UID(INSN) ((INSN)->fld[0].rtint) 249 #define PREV_INSN(INSN) ((INSN)->fld[1].rtx) 250 #define NEXT_INSN(INSN) ((INSN) [all...] |
H A D | loop.h | 26 #define INSN_LUID(INSN) \ 27 (INSN_UID (INSN) < max_uid_for_loop ? uid_luid[INSN_UID (INSN)] \
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H A D | basic-block.h | 234 #define BLOCK_FOR_INSN(INSN) VARRAY_BB (basic_block_for_insn, INSN_UID (INSN)) 235 #define BLOCK_NUM(INSN) (BLOCK_FOR_INSN (INSN)->index + 0)
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/haiku-buildtools/gcc/gcc/ |
H A D | sched-int.h | 103 /* Increases effective priority for INSN by AMOUNT. */ 113 #define INSN_LUID(INSN) (sched_luids[INSN_UID (INSN)]) 116 #define SET_INSN_LUID(INSN, LUID) \ 117 (sched_luids[INSN_UID (INSN)] = (LUID)) 206 two alternative contents, and INSN the instruction that must be 273 single {INSN, DEPS}_LIST rtx. */ 510 This may also be an INSN that writes memory if the pending lists grow 625 /* Called to notify the frontend that instruction INSN is being 629 /* Called to notify the frontend that an instruction INSN i [all...] |
H A D | basic-block.h | 233 #define FOR_BB_INSNS(BB, INSN) \ 234 for ((INSN) = BB_HEAD (BB); \ 235 (INSN) && (INSN) != NEXT_INSN (BB_END (BB)); \ 236 (INSN) = NEXT_INSN (INSN)) 240 #define FOR_BB_INSNS_SAFE(BB, INSN, CURR) \ 241 for ((INSN) = BB_HEAD (BB), (CURR) = (INSN) ? NEXT_INSN ((INSN)) [all...] |
H A D | sel-sched-ir.h | 557 #define FOR_EACH_INSN(INSN, I, L) _FOR_EACH (insn, (INSN), (I), (L)) 558 #define FOR_EACH_INSN_1(INSN, I, LP) _FOR_EACH_1 (insn, (INSN), (I), (LP)) 610 o INSN - INSN that cannot be cloned 611 o USE - INSN that can be cloned 612 o SET - INSN that can be cloned and separable into lhs and rhs 659 unusual stuff. Such a vinsn is described by its INSN field, which is a 798 #define SID(INSN) ( [all...] |
H A D | df.h | 746 #define DF_INSN_INFO_GET(INSN) (df->insns[(INSN_UID (INSN))]) 747 #define DF_INSN_INFO_SET(INSN,VAL) (df->insns[(INSN_UID (INSN))]=(VAL)) 754 #define DF_INSN_LUID(INSN) (DF_INSN_INFO_LUID (DF_INSN_INFO_GET (INSN))) 755 #define DF_INSN_DEFS(INSN) (DF_INSN_INFO_DEFS (DF_INSN_INFO_GET (INSN))) 756 #define DF_INSN_USES(INSN) (DF_INSN_INFO_USES (DF_INSN_INFO_GET (INSN))) [all...] |
/haiku-buildtools/binutils/gas/ |
H A D | itbl-parse.h | 53 INSN = 263, enumerator in enum:yytokentype 66 #define INSN 263 macro
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H A D | itbl-parse.y | 289 %token DREG CREG GREG IMMED ADDR INSN NUM ID NL PNUM 314 | pnum INSN name value range flags 316 DBG (("line %d: entry pnum=%d type=INSN name=%s value=x%x",
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H A D | itbl-lex.l | 61 "insn"|"INSN" { 62 return INSN;
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/haiku-buildtools/gcc/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/ |
H A D | vmull_n.c | 18 #define TEST_VMULL_N1(INSN, T1, T2, W, W2, N, L) \ 20 INSN##_n_##T2##W(VECT_VAR(vector, T1, W, N), \ 24 #define TEST_VMULL_N(INSN, T1, T2, W, W2, N, L) \ 25 TEST_VMULL_N1(INSN, T1, T2, W, W2, N, L)
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H A D | vqdmull.c | 33 #define TEST_VQDMULL2(INSN, T1, T2, W, W2, N, EXPECTED_CUMULATIVE_SAT, CMT) \ 36 INSN##_##T2##W(VECT_VAR(vector, T1, W, N), \ 42 /* Two auxliary macros are necessary to expand INSN. */ 43 #define TEST_VQDMULL1(INSN, T1, T2, W, W2, N, EXPECTED_CUMULATIVE_SAT, CMT) \ 44 TEST_VQDMULL2(INSN, T1, T2, W, W2, N, EXPECTED_CUMULATIVE_SAT, CMT)
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H A D | vqdmull_lane.c | 35 #define TEST_VQDMULL_LANE2(INSN, T1, T2, W, W2, N, L, EXPECTED_CUMULATIVE_SAT, CMT) \ 38 INSN##_lane_##T2##W(VECT_VAR(vector, T1, W, N), \ 45 /* Two auxliary macros are necessary to expand INSN. */ 46 #define TEST_VQDMULL_LANE1(INSN, T1, T2, W, W2, N, L, EXPECTED_CUMULATIVE_SAT, CMT) \ 47 TEST_VQDMULL_LANE2(INSN, T1, T2, W, W2, N, L, EXPECTED_CUMULATIVE_SAT, CMT)
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H A D | vqdmull_n.c | 36 #define TEST_VQDMULL_N2(INSN, T1, T2, W, W2, N, L, EXPECTED_CUMULATIVE_SAT, CMT) \ 39 INSN##_n_##T2##W(VECT_VAR(vector, T1, W, N), \ 45 /* Two auxliary macros are necessary to expand INSN. */ 46 #define TEST_VQDMULL_N1(INSN, T1, T2, W, W2, N, L, EXPECTED_CUMULATIVE_SAT, CMT) \ 47 TEST_VQDMULL_N2(INSN, T1, T2, W, W2, N, L, EXPECTED_CUMULATIVE_SAT, CMT)
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H A D | cmp_op.inc | 35 #define TEST_VCOMP1(INSN, Q, T1, T2, T3, W, N) \ 37 INSN##Q##_##T2##W(VECT_VAR(vector, T1, W, N), \ 41 #define TEST_VCOMP(INSN, Q, T1, T2, T3, W, N) \ 42 TEST_VCOMP1(INSN, Q, T1, T2, T3, W, N)
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H A D | vmlXl_n.inc | 8 #define TEST_VMLXL_N1(INSN, T1, T2, W, W2, N, V) \ 9 VECT_VAR(vector_res, T1, W, N) = INSN##_##T2##W2(VECT_VAR(vector, T1, W, N), \ 14 #define TEST_VMLXL_N(INSN, T1, T2, W, W2, N, V) \ 15 TEST_VMLXL_N1(INSN, T1, T2, W, W2, N, V)
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H A D | vqdmlXl_n.inc | 8 #define TEST_VQDMLXL_N1(INSN, T1, T2, W, W2, N, V, EXPECTED_CUMULATIVE_SAT, CMT) \ 11 INSN##_##T2##W2(VECT_VAR(vector, T1, W, N), \ 18 #define TEST_VQDMLXL_N(INSN, T1, T2, W, W2, N, V, EXPECTED_CUMULATIVE_SAT, CMT) \ 19 TEST_VQDMLXL_N1(INSN, T1, T2, W, W2, N, V, EXPECTED_CUMULATIVE_SAT, CMT)
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H A D | vqdmulh_n.c | 43 #define TEST_VQDMULH_N2(INSN, Q, T1, T2, W, N, L, EXPECTED_CUMULATIVE_SAT, CMT) \ 46 INSN##Q##_n_##T2##W(VECT_VAR(vector, T1, W, N), \ 52 /* Two auxliary macros are necessary to expand INSN. */ 53 #define TEST_VQDMULH_N1(INSN, Q, T1, T2, W, N, L, EXPECTED_CUMULATIVE_SAT, CMT) \ 54 TEST_VQDMULH_N2(INSN, Q, T1, T2, W, N, L, EXPECTED_CUMULATIVE_SAT, CMT)
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/haiku-buildtools/binutils/include/opcode/ |
H A D | tic6x-opcode-table.h | 19 /* Define the INSN macro before including this file; it takes as 28 arguments as INSN. */ 132 INSN(abs, l, unary, 1cycle, C62X, 0, 137 INSN(abs, l, 1_or_2_src, 1cycle, C62X, TIC6X_FLAG_NO_CROSS, 142 INSN(abs2, l, unary, 1cycle, C64X, 0, 148 INSN(absdp, s, 1_or_2_src, 2cycle_dp, C67X, TIC6X_FLAG_NO_CROSS, 154 INSN(abssp, s, unary, 1cycle, C67X, 0, 219 INSN(add, l, l3_sat_0, 1cycle, C64XP, 0, 224 INSN(add, l, l3i, 1cycle, C64XP, 0, 229 INSN(ad [all...] |
/haiku-buildtools/gcc/gcc/testsuite/gcc.dg/ |
H A D | pr42388.c | 6 INSN, ADDR_VEC, ADDR_DIFF_VEC, CALL_INSN, CODE_LABEL, BARRIER, NOTE enumerator in enum:rtx_code 40 case INSN:
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/haiku-buildtools/gcc/gcc/testsuite/gcc.c-torture/compile/ |
H A D | 950612-1.c | 15 } INSN; typedef in typeref:enum:__anon1496 24 switch ((INSN)*pc++)
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/haiku-buildtools/gcc/gcc/testsuite/gcc.dg/cpp/ |
H A D | macro1.c | 83 #define PATTERN(INSN) XEXP(INSN, 3)
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