/fuchsia/zircon/third_party/ulib/musl/pthread/ |
H A D | pthread_rwlock_rdlock.c | 3 int pthread_rwlock_rdlock(pthread_rwlock_t* rw) { argument 4 return pthread_rwlock_timedrdlock(rw, 0);
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H A D | pthread_rwlock_wrlock.c | 3 int pthread_rwlock_wrlock(pthread_rwlock_t* rw) { argument 4 return pthread_rwlock_timedwrlock(rw, 0);
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H A D | pthread_rwlock_destroy.c | 3 int pthread_rwlock_destroy(pthread_rwlock_t* rw) { argument
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H A D | pthread_rwlock_init.c | 3 int pthread_rwlock_init(pthread_rwlock_t* restrict rw, const pthread_rwlockattr_t* restrict a) { argument 4 *rw = (pthread_rwlock_t){};
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H A D | pthread_rwlock_trywrlock.c | 3 int pthread_rwlock_trywrlock(pthread_rwlock_t* rw) { argument 4 if (a_cas_shim(&rw->_rw_lock, 0, 0x7fffffff))
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H A D | pthread_rwlock_timedwrlock.c | 3 int pthread_rwlock_timedwrlock(pthread_rwlock_t* restrict rw, const struct timespec* restrict at) { argument 6 r = pthread_rwlock_trywrlock(rw); 11 while (spins-- && atomic_load(&rw->_rw_lock) && !atomic_load(&rw->_rw_waiters)) 14 while ((r = pthread_rwlock_trywrlock(rw)) == EBUSY) { 15 if (!(r = atomic_load(&rw->_rw_lock))) 18 atomic_fetch_add(&rw->_rw_waiters, 1); 19 a_cas_shim(&rw->_rw_lock, r, t); 20 r = __timedwait(&rw->_rw_lock, t, CLOCK_REALTIME, at); 21 atomic_fetch_sub(&rw [all...] |
H A D | pthread_rwlock_timedrdlock.c | 3 int pthread_rwlock_timedrdlock(pthread_rwlock_t* restrict rw, const struct timespec* restrict at) { argument 6 r = pthread_rwlock_tryrdlock(rw); 11 while (spins-- && atomic_load(&rw->_rw_lock) && !atomic_load(&rw->_rw_waiters)) 14 while ((r = pthread_rwlock_tryrdlock(rw)) == EBUSY) { 15 if (!(r = atomic_load(&rw->_rw_lock)) || (r & PTHREAD_MUTEX_OWNED_LOCK_MASK) != PTHREAD_MUTEX_OWNED_LOCK_MASK) 18 atomic_fetch_add(&rw->_rw_waiters, 1); 19 a_cas_shim(&rw->_rw_lock, r, t); 20 r = __timedwait(&rw->_rw_lock, t, CLOCK_REALTIME, at); 21 atomic_fetch_sub(&rw [all...] |
H A D | pthread_rwlock_unlock.c | 4 int pthread_rwlock_unlock(pthread_rwlock_t* rw) { argument 8 val = atomic_load(&rw->_rw_lock); 10 waiters = atomic_load(&rw->_rw_waiters); 12 } while (a_cas_shim(&rw->_rw_lock, val, new) != val); 15 __wake(&rw->_rw_lock, cnt);
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H A D | pthread_rwlock_tryrdlock.c | 3 int pthread_rwlock_tryrdlock(pthread_rwlock_t* rw) { argument 6 val = atomic_load(&rw->_rw_lock); 12 } while (a_cas_shim(&rw->_rw_lock, val, val + 1) != val);
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/fuchsia/zircon/system/dev/block/zxcrypt/ |
H A D | extra.cpp | 32 if (add_overflow(block->rw.offset_dev, reserved_blocks, &block->rw.offset_dev)) { 33 zxlogf(ERROR, "adjusted offset overflow: block->rw.offset_dev=%" PRIu64 "\n", 34 block->rw.offset_dev); 37 vmo = block->rw.vmo; 38 length = block->rw.length; 39 offset_dev = block->rw.offset_dev; 40 offset_vmo = block->rw.offset_vmo;
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H A D | worker.cpp | 124 if (mul_overflow(block->rw.length, device_->block_size(), &length) || 125 mul_overflow(block->rw.offset_dev, device_->block_size(), &offset_dev) || 129 block->rw.length, block->rw.offset_dev, extra->offset_vmo); 153 if (mul_overflow(block->rw.length, device_->block_size(), &length) || 154 mul_overflow(block->rw.offset_dev, device_->block_size(), &offset_dev) || 155 mul_overflow(block->rw.offset_vmo, device_->block_size(), &offset_vmo)) { 158 block->rw.length, block->rw.offset_dev, block->rw [all...] |
/fuchsia/zircon/system/dev/nand/nand/ |
H A D | nand.c | 100 if (nand_op->rw.data_vmo != ZX_HANDLE_INVALID) { 101 const size_t offset_bytes = nand_op->rw.offset_data_vmo * dev->nand_info.page_size; 105 0, nand_op->rw.data_vmo, aligned_offset_bytes, 106 nand_op->rw.length * dev->nand_info.page_size + page_offset_bytes_data, 116 if (nand_op->rw.oob_vmo != ZX_HANDLE_INVALID) { 117 const size_t offset_bytes = nand_op->rw.offset_oob_vmo * dev->nand_info.page_size; 121 0, nand_op->rw.oob_vmo, aligned_offset_bytes, 122 nand_op->rw.length * dev->nand_info.oob_size + page_offset_bytes_oob, 128 dev->nand_info.page_size * nand_op->rw.length + 137 for (uint32_t i = 0; i < nand_op->rw [all...] |
H A D | nand_driver_test.c | 93 nand_op->rw.offset_nand = cmd_read_page->nand_page; 94 nand_op->rw.length = 1; 95 nand_op->rw.offset_data_vmo = 0; 96 nand_op->rw.offset_oob_vmo = 0; 98 nand_op->rw.data_vmo = do_data ? vmo_data : ZX_HANDLE_INVALID; 99 nand_op->rw.oob_vmo = do_oob ? vmo_oob : ZX_HANDLE_INVALID; 171 nand_op->rw.offset_nand = cmd_write_page->nand_page; 172 nand_op->rw.length = 1; 173 nand_op->rw.offset_data_vmo = 0; 174 nand_op->rw [all...] |
/fuchsia/zircon/system/dev/nand/ram-nand/ |
H A D | ram-nand.cpp | 191 if (operation->rw.offset_nand >= max_pages || !operation->rw.length || 192 (max_pages - operation->rw.offset_nand) < operation->rw.length) { 196 if (operation->rw.data_vmo == ZX_HANDLE_INVALID && 197 operation->rw.oob_vmo == ZX_HANDLE_INVALID) { 299 if (operation->rw.data_vmo == ZX_HANDLE_INVALID) { 303 uint32_t nand_addr = operation->rw.offset_nand * params_.page_size; 304 uint64_t vmo_addr = operation->rw.offset_data_vmo * params_.page_size; 305 uint32_t length = operation->rw [all...] |
/fuchsia/zircon/system/dev/block/sdmmc/ |
H A D | sdmmc.c | 109 "command", TA_INT32(bop->rw.command), 110 "extra", TA_INT32(bop->rw.extra), 111 "length", TA_INT32(bop->rw.length), 112 "offset_vmo", TA_INT64(bop->rw.offset_vmo), 113 "offset_dev", TA_INT64(bop->rw.offset_dev), 114 "pages", TA_POINTER(bop->rw.pages), 237 if ((btxn->rw.offset_dev >= max) || ((max - btxn->rw.offset_dev) < btxn->rw.length)) { 241 if (btxn->rw [all...] |
/fuchsia/zircon/system/dev/nand/ram-nand/test/ |
H A D | ram-nand.cpp | 209 operation->rw.data_vmo = GetVmo(); 210 return operation->rw.data_vmo != ZX_HANDLE_INVALID; 218 operation->rw.oob_vmo = GetVmo(); 219 return operation->rw.oob_vmo != ZX_HANDLE_INVALID; 313 op->rw.command = NAND_OP_WRITE; 320 op->rw.length = 1; 325 op->rw.offset_nand = kNumPages; 332 op->rw.offset_nand = kNumPages - 1; 355 op->rw.command = NAND_OP_WRITE; 356 op->rw [all...] |
/fuchsia/zircon/system/dev/nand/skip-block/ |
H A D | skip-block.cpp | 58 op->rw.offset_nand = ctx->physical_block * ctx->nand_info->pages_per_block; 59 op->rw.offset_data_vmo += ctx->nand_info->pages_per_block; 106 op->rw.command = NAND_OP_WRITE; 107 op->rw.data_vmo = ctx->op.vmo; 108 op->rw.oob_vmo = ZX_HANDLE_INVALID; 109 op->rw.length = ctx->nand_info->pages_per_block; 110 op->rw.offset_nand = ctx->physical_block * ctx->nand_info->pages_per_block; 111 op->rw.offset_data_vmo = ctx->op.vmo_offset; 112 op->rw.pages = nullptr; 280 nand_op->rw [all...] |
/fuchsia/zircon/system/dev/nand/broker/ |
H A D | broker.cpp | 151 op->rw.command = (command == IOCTL_NAND_BROKER_READ) ? NAND_OP_READ : NAND_OP_WRITE; 152 op->rw.length = request.length; 153 op->rw.offset_nand = request.offset_nand; 154 op->rw.offset_data_vmo = request.offset_data_vmo; 155 op->rw.offset_oob_vmo = request.offset_oob_vmo; 156 op->rw.data_vmo = request.data_vmo ? request.vmo : ZX_HANDLE_INVALID; 157 op->rw.oob_vmo = request.oob_vmo ? request.vmo : ZX_HANDLE_INVALID; 174 response->corrected_bit_flips = op->rw.corrected_bit_flips;
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/fuchsia/zircon/system/dev/nand/nandpart/ |
H A D | aml-bad-block.cpp | 170 nand_op->rw.command = NAND_OP_WRITE; 171 nand_op->rw.data_vmo = data_vmo_.get(); 172 nand_op->rw.oob_vmo = oob_vmo_.get(); 173 nand_op->rw.length = num_pages; 174 nand_op->rw.offset_nand = nand_page; 175 nand_op->rw.offset_data_vmo = 0; 176 nand_op->rw.offset_oob_vmo = 0; 234 nand_op->rw.command = NAND_OP_READ; 235 nand_op->rw.data_vmo = data_vmo_.get(); 236 nand_op->rw [all...] |
/fuchsia/zircon/system/dev/block/ahci/ |
H A D | sata.c | 75 .rw.vmo = vmo, 76 .rw.length = 1, 77 .rw.offset_dev = 0, 78 .rw.offset_vmo = 0, 79 .rw.pages = NULL, 243 if (bop->rw.length == 0) { 248 if ((bop->rw.offset_dev >= dev->info.block_count) || 249 ((dev->info.block_count - bop->rw.offset_dev) < bop->rw.length)) {
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/fuchsia/zircon/system/ulib/ddk/include/ddk/protocol/ |
H A D | block.h | 24 // The rw.pages field may be modified but the *contents* of the array it points 43 } rw; member in union:block_op::__anon922 79 // Read and Write ops use u.rw for parameters. 81 // If u.rw.pages is not NULL, the VMO is already appropriately pinned 86 // ((u.rw.length + 1U * block_size + PAGE_SIZE - 1) / PAGE_SIZE)
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H A D | nand.h | 87 } rw; member in union:nand_op::__anon959
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/fuchsia/zircon/system/dev/bus/virtio/ |
H A D | block.cpp | 296 req->sector = txn->op.rw.offset_dev; 344 size_t page0_offset = txn->op.rw.offset_vmo & PAGE_MASK; 382 txn->op.rw.offset_vmo *= config_.blk_size; 385 if ((txn->op.rw.offset_dev >= config_.capacity) || 386 (config_.capacity - txn->op.rw.offset_dev < txn->op.rw.length)) { 392 if (txn->op.rw.length == 0) { 397 size_t bytes = txn->op.rw.length * config_.blk_size; 399 uint64_t suboffset = txn->op.rw.offset_vmo & PAGE_MASK; 400 uint64_t aligned_offset = txn->op.rw [all...] |
/fuchsia/zircon/system/dev/block/gpt/ |
H A D | gpt.c | 157 size_t blocks = bop->rw.length; 161 if ((bop->rw.offset_dev >= max) || 162 ((max - bop->rw.offset_dev) < blocks)) { 168 bop->rw.offset_dev += gpt->gpt_entry.first; 283 bop->rw.vmo = vmo; 284 bop->rw.length = 1; 285 bop->rw.offset_dev = 1; 286 bop->rw.offset_vmo = 0; 287 bop->rw.pages = NULL; 320 bop->rw [all...] |
/fuchsia/zircon/system/dev/block/fvm/ |
H A D | fvm.cpp | 203 bop->rw.vmo = vmo; 204 bop->rw.length = static_cast<uint32_t>(length); 205 bop->rw.offset_dev = dev_offset; 206 bop->rw.offset_vmo = vmo_offset; 207 bop->rw.pages = NULL; 1051 if (txn->rw.length == 0) { 1054 } else if ((txn->rw.offset_dev >= device_capacity) || 1055 (device_capacity - txn->rw.offset_dev < txn->rw.length)) { 1064 size_t vslice_start = txn->rw [all...] |