Searched refs:nregs (Results 1 - 8 of 8) sorted by relevance

/fuchsia/zircon/third_party/ulib/jemalloc/test/unit/
H A Dpack.c55 uint32_t nregs; local
61 assert_d_eq(mallctlnametomib("arenas.bin.0.nregs", mib, &miblen), 0,
64 sz = sizeof(nregs);
65 assert_d_eq(mallctlbymib(mib, miblen, (void *)&nregs, &sz, NULL,
67 return (nregs);
100 size_t nregs = nregs_per_run * NSLABS; local
101 VARIABLE_ARRAY(void *, ptrs, nregs);
H A Dslab.c16 for (regind = 0; regind < bin_info->nregs; regind++) {
H A Dmallctl.c114 assert_d_eq(mallctlnametomib("arenas.bin.0.nregs", mib, &miblen), 0,
581 TEST_ARENAS_BIN_CONSTANT(uint32_t, nregs, arena_bin_info[0].nregs);
/fuchsia/zircon/third_party/ulib/jemalloc/include/jemalloc/internal/
H A Darena_structs_b.h19 * | region nregs-1 |
30 uint32_t nregs; member in struct:arena_bin_info_s
/fuchsia/zircon/third_party/ulib/jemalloc/src/
H A Darena.c11 #define BIN_INFO_bin_yes(reg_size, slab_size, nregs) \
12 {reg_size, slab_size, nregs, BITMAP_INFO_INITIALIZER(nregs)},
13 #define BIN_INFO_bin_no(reg_size, slab_size, nregs)
170 assert(regind < arena_bin_info[binind].nregs);
183 assert(slab_data->nfree < bin_info->nregs);
991 slab_data->nfree = bin_info->nregs;
1076 bin_info->nregs) {
1340 if (bin_info->nregs == 1)
1402 if (slab_data->nfree == bin_info->nregs) {
[all...]
H A Dstats.c68 uint32_t nregs; local
83 CTL_M2_GET("arenas.bin.0.nregs", j, &nregs, uint32_t);
134 availregs = nregs * curslabs;
158 nregs, slab_size / page, util, nfills,
168 nregs, slab_size / page, util, nslabs,
718 CTL_M2_GET("arenas.bin.0.nregs", i, &u32v, uint32_t);
720 "\t\t\t\t\t\"nregs\": %"FMTu32",\n", u32v);
H A Dtcache.c506 if ((arena_bin_info[i].nregs << 1) <= TCACHE_NSLOTS_SMALL_MIN) {
509 } else if ((arena_bin_info[i].nregs << 1) <=
512 (arena_bin_info[i].nregs << 1);
H A Dctl.c281 {NAME("nregs"), CTL(arenas_bin_i_nregs)},
1949 CTL_RO_NL_GEN(arenas_bin_i_nregs, arena_bin_info[mib[2]].nregs, uint32_t)

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