Searched refs:interrupts (Results 1 - 21 of 21) sorted by relevance

/fuchsia/zircon/kernel/platform/pc/include/platform/
H A Dpc.h11 #include <arch/x86/interrupts.h>
16 /* defined interrupts */
/fuchsia/zircon/kernel/include/kernel/
H A Dstats.h23 // cpu level interrupts and exceptions
24 ulong interrupts; // hardware interrupts, minus timer interrupts or inter-processor interrupts member in struct:cpu_stats
25 ulong timer_ints; // timer interrupts
27 ulong perf_ints; // performance monitor interrupts
31 // inter-processor interrupts
/fuchsia/zircon/system/dev/block/sdmmc/
H A Drules.mk17 $(LOCAL_DIR)/sdio-interrupts.c \
/fuchsia/zircon/system/dev/display/intel-i915/
H A Drules.mk21 $(LOCAL_DIR)/interrupts.cpp \
H A Dpipe.cpp82 controller_->interrupts()->EnablePipeVsync(pipe_, true);
86 controller_->interrupts()->EnablePipeVsync(pipe_, true);
H A Dintel-i915.h23 #include "interrupts.h"
114 Interrupts* interrupts() { return &interrupts_; } function in class:i915::Controller
/fuchsia/zircon/system/dev/usb/dwc2/
H A Ddwc2.c796 dwc->channel_interrupts[channel] = chanptr->interrupts;
800 chanptr->interrupts.val = 0xffffffff;
807 union dwc_core_interrupts interrupts = regs->core_interrupts; local
809 if (interrupts.port_intr) {
852 if (interrupts.sof_intr) {
860 if (interrupts.host_channel_intr) {
871 // Thread to handle interrupts.
1136 chanptr->interrupts.val = 0xffffffff;
1359 union dwc_host_channel_interrupts interrupts,
1397 if (!interrupts
1356 handle_normal_channel_halted(uint channel, dwc_usb_transfer_request_t* req, dwc_usb_endpoint_t* ep, union dwc_host_channel_interrupts interrupts, dwc_usb_t* dwc) argument
1474 handle_channel_halted_interrupt(uint channel, dwc_usb_transfer_request_t* req, dwc_usb_endpoint_t* ep, union dwc_host_channel_interrupts interrupts, dwc_usb_t* dwc) argument
1667 union dwc_host_channel_interrupts interrupts = local
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/fuchsia/zircon/kernel/platform/pc/
H A Drules.mk19 $(LOCAL_DIR)/interrupts.cpp \
H A Dinterrupts.cpp12 #include <arch/x86/interrupts.h>
90 // Initialize the delivery modes/targets for the ISA interrupts
247 // 0-31 are reserved for architecture defined interrupts & exceptions
/fuchsia/zircon/kernel/arch/x86/include/arch/
H A Dhypervisor.h10 #include <arch/x86/interrupts.h>
67 // Tracks pending interrupts.
/fuchsia/zircon/kernel/kernel/
H A Ddebug.cpp136 printf("\ttimer interrupts: %lu\n", percpu[i].stats.timer_ints);
249 percpu[i].stats.interrupts - old_stats[i].interrupts,
/fuchsia/zircon/kernel/arch/x86/
H A Didt.cpp22 #include <arch/x86/interrupts.h>
H A Ddescriptor.cpp13 #include <arch/x86/interrupts.h>
H A Dmp.cpp23 #include <arch/x86/interrupts.h>
132 // interrupts
H A Dfaults.cpp15 #include <arch/x86/interrupts.h>
253 /* reenable interrupts */
258 /* make sure we put interrupts back as we exit */
H A Dlapic.cpp16 #include <arch/x86/interrupts.h>
H A Dioapic.cpp10 #include <arch/x86/interrupts.h>
/fuchsia/zircon/third_party/ulib/usb-dwc-regs/include/dwc2/
H A Dusb_dwc_regs.h50 /** Enable interrupts from the USB controller. Disabled by default. */
100 * This register contains the state of pending top-level DWC interrupts. 1
130 * pending interrupts, then handle and clear the interrupts for
291 * interrupts by writing to this register; use the channel-specific
596 * These bits can be used with or without "real" interrupts. To have
599 * interrupts from the channel are enabled in the
600 * host_channels_interrupt_mask register, channel interrupts overall are
601 * enabled in the core_interrupt_mask register, and interrupts from the
731 } interrupts; member in struct:dwc_regs::dwc_host_channel
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/fuchsia/zircon/kernel/dev/interrupt/arm_gic/v2/
H A Darm_gicv2.cpp67 // INTIDs 0-15 are local CPU interrupts
88 GICREG(0, GICC_PMR) = 0xFF; // unmask interrupts at all priority levels
157 // Set external interrupts to target cpu 0
215 // Only configurable for SPI interrupts
273 CPU_STATS_INC(interrupts);
329 // Turn off all GIC0 interrupts at the distributor.
348 // We're going to check four interrupts at a time. Build a repeated mask for the current CPU.
368 // interrupts targeted at this CPU (PPIs and SPIs).
372 // Turn off interrupts at the CPU interface.
418 printf("GICv2: failed to detect GICv2, interrupts wil
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/fuchsia/zircon/kernel/dev/interrupt/arm_gic/v3/
H A Darm_gicv3.cpp69 // INTIDs 0-15 are local CPU interrupts
139 // enable group 1 interrupts.
342 CPU_STATS_INC(interrupts);
399 // Turn off all GIC0 interrupts at the distributor.
444 // interrupts targeted at this CPU (PPIs and SPIs).
449 // Disable group 1 interrupts at the CPU interface.
542 printf("GICv3: failed to detect GICv3, interrupts will be broken\n");
/fuchsia/zircon/kernel/syscalls/
H A Dobject.cpp479 stats.ints = cpu->stats.interrupts;

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