Searched refs:REG_6 (Results 1 - 3 of 3) sorted by relevance

/fuchsia/zircon/system/dev/gpio/aml-gxl-gpio/
H A Ds905x-blocks.h121 #define REG_6 S905X_PERIPHS_PIN_MUX_6 macro
199 { .regs = { REG_6 }, .bits = { 31 }, },
200 { .regs = { REG_6 }, .bits = { 30 }, },
201 { .regs = { REG_6 }, .bits = { 29 }, },
203 { .regs = { REG_6, REG_6 }, .bits = { 28, 27 }, },
205 { .regs = { 0, 0, REG_6 }, .bits = { 0, 0, 26 }, },
206 { .regs = { 0, 0, REG_6, REG_6 }, .bits = { 0, 0, 25, 22 }, },
207 { .regs = { 0, 0, REG_6, REG_
295 #undef REG_6 macro
[all...]
H A Ds912-blocks.h121 #define REG_6 S912_PERIPHS_PIN_MUX_6 macro
199 { .regs = { REG_6 }, .bits = { 31 }, },
200 { .regs = { REG_6 }, .bits = { 30 }, },
201 { .regs = { REG_6 }, .bits = { 29 }, },
203 { .regs = { REG_6, REG_6 }, .bits = { 28, 27 }, },
205 { .regs = { 0, 0, REG_6, 0, REG_6 }, .bits = { 0, 0, 26, 0, 20 }, },
206 { .regs = { 0, 0, REG_6, REG_6, REG_
296 #undef REG_6 macro
[all...]
H A Ds905-blocks.h134 #define REG_6 S905_PERIPHS_PIN_MUX_6 macro
198 { .regs = { REG_6, REG_5 }, .bits = { 1, 5 }, },
199 { .regs = { REG_6, REG_5 }, .bits = { 0, 6 }, },
200 { .regs = { REG_6 }, .bits = { 13 }, },
201 { .regs = { REG_6, REG_5 }, .bits = { 12, 7 }, },
202 { .regs = { REG_6, REG_5 }, .bits = { 11, 4 }, },
203 { .regs = { REG_6, REG_5 }, .bits = { 10, 4 }, },
204 { .regs = { REG_6, REG_5, REG_5, REG_5, REG_4 }, .bits = { 9, 4, 27, 9 }, },
205 { .regs = { REG_6, REG_5, REG_5, REG_5, REG_4 }, .bits = { 8, 4, 26, 8 }, },
206 { .regs = { REG_6, REG_
328 #undef REG_6 macro
[all...]

Completed in 80 milliseconds