Searched refs:ENCL_VIDEO_VSO_BLINE (Results 1 - 2 of 2) sorted by relevance

/fuchsia/zircon/system/dev/display/astro-display/
H A Dhhi-regs.h41 #define ENCL_VIDEO_VSO_BLINE (0x1cb9 << 2) macro
H A Dastro-clock.cpp280 WRITE32_REG(VPU, ENCL_VIDEO_VSO_BLINE, lcd_timing_.vs_vs_addr);

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