Searched refs:CODE_64_SELECTOR (Results 1 - 9 of 9) sorted by relevance

/fuchsia/zircon/system/utest/hypervisor/
H A Dx86.S18 #define CODE_64_SELECTOR (2<<3) define
53 // CODE_64_SELECTOR
119 .2byte CODE_64_SELECTOR // Segment selector
149 .2byte CODE_64_SELECTOR // Segment selector
265 pushl $CODE_64_SELECTOR
293 pushl $CODE_64_SELECTOR
315 mov $((USER_CODE_32_SELECTOR << 16) | CODE_64_SELECTOR), %edx
340 mov $CODE_64_SELECTOR, %eax
368 mov $CODE_64_SELECTOR, %eax
/fuchsia/zircon/kernel/arch/x86/include/arch/x86/
H A Ddescriptor.h18 #define CODE_64_SELECTOR 0x10 macro
/fuchsia/zircon/kernel/arch/x86/
H A Dexceptions.S168 * additionally use CODE_64_SELECTOR as CS, 0 as SS, RFLAGS value and current
187 movq $CODE_64_SELECTOR, 0x18(%rsp) // CS
H A Dstart.S214 pushl $CODE_64_SELECTOR /*Need to put it in a the right CS*/
332 push $CODE_64_SELECTOR
H A Dbootstrap16.cpp156 bootstrap_data->long_mode_cs = CODE_64_SELECTOR;
H A Didt.cpp97 sel = CODE_64_SELECTOR;
H A Dfaults.cpp62 if (frame->cs == CODE_64_SELECTOR) {
495 if (context->frame->cs != CODE_64_SELECTOR && is_user_address(context->frame->user_sp)) {
H A Dmp.cpp152 * CS = CODE_64_SELECTOR (STAR[47:32])
158 write_msr(X86_MSR_IA32_STAR, (uint64_t)USER_CODE_SELECTOR << 48 | (uint64_t)CODE_64_SELECTOR << 32);
/fuchsia/zircon/kernel/arch/x86/hypervisor/
H A Dvcpu.cpp478 vmcs.Write(VmcsField16::HOST_CS_SELECTOR, CODE_64_SELECTOR);

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